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參數(shù)資料
| 型號(hào)： | ISL54200EVAL1Z |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 13/18頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | EVALUATION BOARD FOR ISL54200 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，2:1 多路復(fù)用器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ISL54200 |
| 主要屬性： | 2 x SPDT 模擬開(kāi)關(guān) |
| 次要屬性： | 2.7 V ~ 5.5 V 電源 |
| 已供物品： | 板 |
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ISL54200
4
FN6408.2
June 17, 2010
Absolute Maximum Ratings
Thermal Information
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
Input Voltages
Output Voltages
COMD1, COMD2 (Note 6) . . . . . . . . . . . . . . . . . -1V to 5V
Continuous Current (HSD2, HSD1, FSD2, FSD1) . . . ±40mA
Peak Current (HSD2, HSD1, FSD2, FSD1)
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . ±100mA
ESD Rating:
HBM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >7kV
MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >400V
CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>1.4kV
Latch-up Tested per JEDEC; Class II Level A . . . . . at +85°C
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
10 Ld TQFN (Notes 7, 8) . . . . . . .
145
90
10 Ld TDFN (Notes 9, 10) . . . . . . .
55
16.5
Maximum Junction Temperature (Plastic Package). . +150°C
Maximum Storage Temperature Range. . . . . -65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C
VDD Supply Voltage Range . . . . . . . . . . . . . . . 2.7V to 5.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
6. Signals on FSD1, FSD2, HSD1, HSD2, COMD1, COMD2, EN, IN exceeding VDD or GND by specified amount are clamped. Limit
current to maximum current ratings.
7. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
8. For θJC, the “case temp” location is taken at the package top center.
9. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
10. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V,
face limits apply over the operating temperature range, -40°C to
+85°C.
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 12, 13) TYP
MAX
ANALOG SWITCH CHARACTERISTICS
NC Switches (FSD1, FSD2)
Analog Signal Range, VANALOG VDD = 3.3V, IN = 0V, EN = 3.3V
Full
0
-
VDD
V
ON-Resistance, rON
VDD = 3.3V, IN = 0.5V, EN = 1.4V, ICOMx = 40mA,
+25
-
7
10
Ω
Full
-
15
Ω
rON Matching Between
Channels, ΔrON
VDD = 3.3V, IN = 0.5V, EN = 1.4V, ICOMx = 40mA,
VFSD1 or VFSD2 = Voltage at max rON over signal
range of 0V to 3.3V, (Note 15)
+25
-
0.1
0.35
Ω
Full
-
0.4
Ω
rON Flatness, rFLAT(ON)
VDD = 3.3V, IN = 0.5V, EN = 1.4V, ICOMx = 40mA,
+25
-
4
6
Ω
Full
-
8
Ω
OFF Leakage Current, IFSX(OFF) V+ = 3.6V, IN = 3.6V, EN = 0V and 3.6V, VCOMx
= 0.3V, 3V, VFSX = 3V, 0.3V
+25
-20
2
20
nA
Full
-70
-
70
nA
ON Leakage Current, IFSX(ON) V+ = 3.6V, IN = 0V, EN = 3.6V, VCOMx = 0.3V,
3V, VFSX = 0.3V, 3V
+25
-20
2
20
nA
Full
-70
-
70
nA
NO Switches (HSD1, HSD2)
Analog Signal Range, VANALOG VDD = 3.3V, IN = 3.3V, EN = 3.3V
Full
0
-
VDD
V
ISL54200
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