2
FN6725.0
June 17, 2008
Block Diagram of ISL54100A (ISL54101A, ISL54102A identical except for number of channels)
2
TX1
2
TX0
2
TXC
2
TX2
CONFIGURATION AND CONTROL
RES_BIAS
SCL
PD
RESET
CH_A_ACTIVE
CH_B_ACTIVE
CH_C_ACTIVE
CH_D_ACTIVE
AUTO_CH_SEL
CH_SEL_ 0
CH_SEL_1
7
ADDR
SDA
RX0_A
2
RXC_A
RX1_A
RX2_A
RX0_B
2
RXC_B
RX1_B
RX2_B
RX0_C
2
RXC_C
RX1_C
RX2_C
RX0_D
2
RXC_D
RX1_D
RX2_D
CDR
CH0
CDR
CH1
CDR
CH2
2
PLL
FIFO
RES_TERM
BIAS
GENERATION
TERMINATION
AND
EQUALIZATION
TERMINATION
AND
EQUALIZATION
TERMINATION
AND
EQUALIZATION
TERMINATION
AND
EQUALIZATION
TERMINATION
Ordering Information
PART NUMBER
(Note)
NUMBER OF
CHANNELS
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL54100ACQZ
4
0 to +70
128 Ld MQFP
MDP0055
ISL54101ACQZ
1
0 to +70
128 Ld MQFP
MDP0055
ISL54102ACQZ
2
0 to +70
128 Ld MQFP
MDP0055
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
ISL54100A, ISL54101A, ISL54102A