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| 型號： | ISL26329FVZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 13/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT SPI/SRL 16-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 960 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 80mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個單端，單極 |
ISL26320, ISL26321, ISL26322, ISL26323, ISL26324, ISL26325, ISL26329
20
FN8273.1
September 5, 2013
Device Configuration Registers
The Input Multiplexer Channel Select and power management
features are controlled by loading the appropriate bits into the
16-bit Configuration Register through the serial port, MSB-first,
as shown below. The first two Load bits LD1-LD0 must be set to
“11” in order to perform a Register update: any other setting will
leave the Register unchanged. Changes to the Configuration
Register will be implemented internally immediately following
the completion of the current conversion, or require a dummy
conversion in order to take effect. Also, in the case of all power
management features, a recovery time will be incurred when
returning to normal operation, as indicated.
Power Management Modes
In all SPI interface modes (RAC, RDC, etc.) the device has three
states of operation: Acquisition, Conversion and Idle. Power
management modes decide the state of the ADC in Idle mode
and are selected by the PM bits in the Configuration Register as
In the default mode (Continuous Operation) the ADC is fully
powered in the Idle state and can be taken back to the
Acquisition state instantaneously. In this mode the ADC can be
operated with maximum throughput and hence is ideally suitable
for applications where the ADC is operated continuously.
In Auto Sleep Mode the ISL263XX will be in a sleep state
consuming less than 0.4mA. However, it should be noted that the
requirements on tACQ are more stringent in Auto Sleep mode
since the device must wake up and then perform the Acquisition.
In Auto Power Down Mode (as selected by PM bits) the ADC will be in
power-down condition during the Idle period, consuming less than
5A of current. Wake-up time takes 150s. The acquisition time
(tACQ) must be increased to account for this delay.
The power management modes provide a high degree of
flexibility in trading average power consumption versus the
required throughput. Significant power savings can be achieved
by operating in either Auto Sleep Mode or Auto Power-Down
mode depending on the throughput requirements.
TABLE 3. CONFIGURATION REGISTER
BIT 15
(MSB)
14
13
12
11
10
9
8
LD1
LD0
ADDR2
ADDR1
ADDR0
PM1
PM0 Unused
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2 BIT 1
BIT 0
(LSB)
RGRD
Unused
TABLE 4. CONFIGURATION REGISTER 2
BIT(S)
DESCRIPTION
15:14 Register Load word, set to “11” to update registers,
otherwise previous settings are retained.
13:11 Multiplexer Channel Select word ADDR2:0.
000H: Channel AIN0 (single-ended input devices) or AIN0+/AIN0-
(differential input devices).
001H: Channel AIN1 or AIN1+/AIN1-
010H: Channel AIN2 or AIN2+/AIN2-
011H: Channel AIN3 or AIN3+/AIN3-
100H: Channel AIN4
101H: Channel AIN5
110H: Channel AIN6
111H: Channel AIN7
10:9 Power Management Configuration Control
00H: Auto Power-Down mode. Device will go into Power-down
mode automatically at the end of the next conversion cycle.
01H: Continuous Operation mode (default). Device remains fully
powered at all times.
1xH: Auto Sleep Mode. Device will enter reduced-power Sleep
mode automatically at the end of the next conversion cycle. A "1"
in PM1 overrides the setting in PM0.
8Unused.
7
Register readback mode. "1" means register readback is enabled
resulting in configuration settings to be output along with
conversion results. "0" (default) mode of operation register
settings are not output.
6:0 Unused.
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