8 FN8273.1 September 5, 2013 tACQ<" />
參數(shù)資料
型號(hào)： ISL26320FBZ-T7A
廠商： Intersil
文件頁(yè)數(shù)： 22/23頁(yè)
文件大?。?/td> 0K
描述： IC ADC 12BIT SPI/SRL 250K 8SOIC
標(biāo)準(zhǔn)包裝： 250
位數(shù)： 12
采樣率（每秒）： 250k
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 80mW
電壓電源： 單電源
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SOIC
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)差分，單極
ISL26320, ISL26321, ISL26322, ISL26323, ISL26324, ISL26325, ISL26329
8
FN8273.1
September 5, 2013
tACQ
Acquisition Time in Auto Sleep Mode
1.7
s
tACQ
Acquisition time in Auto Power Down
Mode
150
s
tSCLKH
SCLK High Time
20
ns
tSCLKL
SCLK Low Time
20
ns
tCNV
CNV Pulse Width
100
ns
NOTES:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
7. The device may become nonresponsive if the minimum acquisition times are not met in their respective modes, requiring a power cycle to restore
normal operation.
8. Transition time to high impedance state is dominated by RC loading on the SDOUT pin. Specified value is measured using equivalent loading shown
in Figure 2.
Electrical Specifications VREF = VDD V, VDD = 2.7V to 5V, VCM = VDD/2, SCLK = 20MHz and TA = -40°C to +125°C (typical performance
at +25°C), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued)
SYMBOL
PARAMETER
TEST LEVEL OR NOTES
MIN
(Note 6)
TYP
MAX
(Note 6)
UNITS
FIGURE 2. EQUIVALENT LOAD CIRCUIT FOR DIGITAL OUTPUT TESTING
OUTPUT PIN
CL
10pF
VDD
2k
RL
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參數(shù)描述
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ISL26321FBZ 制造商:Intersil Corporation 功能描述:ISL26321FBZ 12-BIT, 250KSPS, SINGLE CH/ENDED DIFFERENTIAL SA - Rail/Tube 制造商:Intersil Corporation 功能描述:IC ADC 12BIT SPI/SRL 250K 8-SOIC
ISL26321FBZ-T 制造商:Intersil Corporation 功能描述:ISL26321FBZ 12-BIT, 250KSPS, SINGLE CH/ENDED DIFFERENTIAL SA - Tape and Reel 制造商:Intersil Corporation 功能描述:IC ADC 12BIT SPI/SRL 250K 8-SOIC
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ISL26322 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:12-bit, 250kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels
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