參數(shù)資料
型號(hào)： ISL12022MIBZR5421
廠商： INTERSIL CORP
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： REAL TIME CLOCK, PDSO20
封裝： ROHS COMPLIANT, PLASTIC, MS-013AC, SOIC-20
文件頁(yè)數(shù)： 8/29頁(yè)
文件大?。?/td> 395K
代理商： ISL12022MIBZR5421
ISL12022MR5421
16
FN7576.1
June 4, 2010
Example - When the LBAT75 is Set to “1” in Battery
Mode
The minute register changes to 30h when the device is in
battery mode, the LBAT75 is set to “1” the next time the
device switches back to Normal Mode.
Example - When the LBAT75 Remains at “0” in
Battery Mode
If the device enters into battery mode after the minute
register reaches 49h and switches back to Normal Mode
before minute register reaches 50h, then the LBAT75 bit
will remain at “0” the next time the device switches
back to Normal Mode.
REAL TIME CLOCK FAIL BIT (RTCF)
This bit is set to a “1” after a total power failure. This is a
read only bit that is set by hardware (ISL12022MR5421
internally) when the device powers up after having lost
all power (defined as VDD = 0V and VBAT = 0V). The bit
is set regardless of whether VDD or VBAT is applied first.
The loss of only one of the supplies does not set the RTCF
bit to “1”. The first valid write to the RTC section after a
complete power failure resets the RTCF bit to “0” (writing
one byte is sufficient).
Interrupt Control Register (INT)
AUTOMATIC RESET BIT (ARST)
This bit enables/disables the automatic reset of the ALM,
LVDD, LBAT85, and LBAT75 status bits only. When ARST
bit is set to “1”, these status bits are reset to “0” after a
valid read of the respective status register (with a valid
STOP condition). When the ARST is cleared to “0”, the
user must manually reset the ALM, LVDD, LBAT85, and
LBAT75 bits.
WRITE RTC ENABLE BIT (WRTC)
The WRTC bit enables or disables write capability into the
RTC Timing Registers. The factory default setting of this
bit is “0”. Upon initialization or power-up, the WRTC must
be set to “1” to enable the RTC. Upon the completion of a
valid write (STOP), the RTC starts counting. The RTC
internal 1Hz signal is synchronized to the STOP condition
during a valid write cycle.
INTERRUPT/ALARM MODE BIT (IM)
This bit enables/disables the interrupt mode of the alarm
function. When the IM bit is set to “1”, the alarm will
operate in the interrupt mode, where an active low pulse
width of 250ms will appear at the IRQ/FOUT pin when
the RTC is triggered by the alarm, as defined by the
alarm registers (0Ch to 11h). When the IM bit is cleared
to “0”, the alarm will operate in standard mode, where
the IRQ/FOUT pin will be set low until the ALM status bit
is cleared to “0”.
FREQUENCY OUTPUT AND INTERRUPT BIT
(FOBATB)
This bit enables/disables the IRQ/FOUT pin during
battery backup mode (i.e. VBAT power source active).
When the FOBATB is set to “1”, the IRQ/FOUT pin is
disabled during battery backup mode. This means that
both the frequency output and alarm output functions
are disabled. When the FOBATB is cleared to “0”, the
IRQ/FOUT pin is enabled during battery backup mode.
Note that the open drain IRQ/FOUT pin will need a
pull-up to the battery voltage to operate in battery
backup mode.
FREQUENCY OUT CONTROL BITS (FO <3:0>)
These bits enable/disable the frequency output function
and select the output frequency at the IRQ/FOUT pin.
See Table 5 for frequency selection. Default for the
ISL12022MR5421 is FO<3:0> = 1h, or 32.768kHz
output (FOUT is ON). When the frequency mode is
enabled, it will override the alarm mode at the
IRQ/FOUT pin.
TABLE 3. INTERRUPT CONTROL REGISTER (INT)
ADDR
7
6
5
4
3210
08h
ARST WRTC
IM
FOBATB FO3FO2 FO1FO0
TABLE 4.
IM BIT
INTERRUPT/ALARM FREQUENCY
0
Single Time Event Set By Alarm
1
Repetitive/Recurring Time Event Set By
Alarm
TABLE 5. FREQUENCY SELECTION OF IRQ/FOUT PIN
FREQUENCY
FOUT
UNITS
FO3
FO2
FO1
FO0
0Hz
0
32768
Hz
0
1
4096
Hz
0
1
0
1024
Hz
0
1
64
Hz
0
1
0
32
Hz
0
1
0
1
16
Hz
0
1
0
8Hz
0
1
4Hz
1
0
2Hz
1
0
1
1Hz
1
0
1
0
1/2
Hz
1
0
1
1/4
Hz
1
0
1/8
Hz
1
0
1
1/16
Hz
1
0
1/32
Hz
1
ISL12022MR5421
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ISL12022MIBZ-T7A 功能描述:IC RTC/CALENDAR TEMP SNSR 20SOIC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 實(shí)時(shí)時(shí)鐘 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:時(shí)鐘/日歷 特點(diǎn):警報(bào)器，閏年，SRAM 存儲(chǔ)容量:- 時(shí)間格式:HH:MM:SS（12/24 小時(shí)） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:8-TDFN EP 包裝:管件
ISL12022MIBZ-TR5421 功能描述:實(shí)時(shí)時(shí)鐘 REAL TIME CLK W/MFK IMPROVED ESD AIR RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
ISL12022MR5421 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM, Integrated 5ppm
ISL12022M-R5421 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Accuracy RTC Modules, Feature-Rich RTCs
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