ISL12022MR5421
30
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in the quality certifications found at www.intersil.com/design/quality
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For information regarding Intersil Corporation and its products, see www.intersil.com
FN7576.3
June 7, 2012
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to
www.intersil.com/products for a
complete list of Intersil product families.
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE
REVISION
CHANGE
May 14, 2012
FN7576.3
specifications.
Added notes
16,
17,
18 to specification table.
Corrected text errors.
October 14, 2011
FN7576.2
On
page 6, Absolute Maximum Ratings: added Shock Resistance and Vibration values.
On page 6, DC Operating Characteristics: for IDD1 at 5V and 3V limits, changed MAX from 7A and 6A to 15A and 14A.
On page 7, Power-Down Timing: added VDDSR+ with TYP value of 0.05V/ms, with reference to Note 15. On
page 13, Oscillator Compensation: text deleted: "These values can be overwritten by the user although
this is not suggested as the resulting temperature compensation performance will be compromised."
On
page 16, Oscillator Fail Bit: changed text from "Oscillator Fail Bit indicates that the oscillator has
stopped." to: "Oscillator Fail Bit indicates that the oscillator has failed. The oscillator frequency is either zero
or very far from the desired 32.768kHz due to failure, PC board contamination or mechanical issues."
On
page 16, Daylight Saving Time Change Bit (DSTADJ): removed "DSTADJ can be set to "1" for instances
where the RTC device is initialized during the DST Forward period." and added "It is read-only and cannot be
written. Setting time during a DST forward period will not set this bit to "1"."
On
page 21, Table
20, FDTR column heading changed from <2:0> to <4:0>
On
page 27, added “Power Supply Considerations” section.
On Page 32, Package Outline Drawing: replaced M20.3, Rev 2, 6/15, with M20.3, Rev 3, 2/11.
May 27, 2010
FN7576.1
March 22, 2010
FN7576.0
Initial Release