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| 型號： | ISL12022MIBZR5421 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 20/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC/CALENDAR TEMP SNSR 20SOIC |
| 應用說明： | Addressing Power Issues in Real Time Clock Appls |
| 產(chǎn)品培訓模塊： | Solutions for Industrial Control Applications |
| 標準包裝： | 760 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，夏令時，閏年，SRAM |
| 存儲容量： | 128B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 20-SOIC |
| 包裝： | 管件 |
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ISL12022MR5421
27
FN7576.3
June 7, 2012
Identification byte with the R/W bit set to “0”, an Address Byte, a
second START, and a second Identification byte with the R/W bit
set to “1”. After each of the three bytes, the ISL12022MR5421
responds with an ACK. Then the ISL12022MR5421 transmits Data
Bytes as long as the master responds with an ACK during the SCL
cycle following the eighth bit of each byte. The master terminates
the read operation (issuing a STOP condition) following the last bit
of the last Data Byte (see Figure 22).
The Data Bytes are from the memory location indicated by an
internal pointer. This pointer’s initial value is determined by the
Address Byte in the Read operation instruction, and increments
by one during transmission of each Data Byte. After reaching the
memory location 2Fh, the pointer “rolls over” to 00h, and the
device continues to output data for each ACK received.
Application Section
Power Supply Considerations
The ISL12022M contains programmed EEPROM registers which
are recalled to volatile RAM registers during initial power-up.
These registers contain DC voltage, frequency and temperature
calibration settings. Initial power-up can be either application of
VBAT or VDD power, whichever is first. It is important that the
initial power-up meet the power supply slew rate specification to
avoid faulty EEPROM power-up recall. Also, any glitches or low
voltage DC pauses should be avoided, as these may activate
recall at a low voltage and load erroneous data into the
calibration registers. Note that a very slow VDD ramp rate
(outside data sheet limits) will almost always trigger erroneous
recall and should be avoided entirely.
Battery Backup Details
The ISL12022MR5421 has automatic switchover to battery
backup when the VDD drops below the VBAT mode threshold. A
wide variety of backup sources can be used, including standard
and rechargeable lithium, super-capacitors, or regulated
secondary sources. The serial interface is disabled in battery
backup, while the oscillator and RTC registers are operational.
The SRAM register contents are powered to preserve their
contents as well.
The input voltage range for VBAT is 1.8V to 5.5V, but keep in mind
the temperature compensation only operates for VBAT >2.7V.
Note that the device is not guaranteed to operate with a VBAT <
1.8V, so the battery should be changed before discharging to that
level. It is strongly advised to monitor the low battery indicators in
the status registers and take action to replace discharged
batteries.
If a supercapacitor is used, it is possible that it may discharge to
below 1.8V during prolonged power-down. Once powered up, the
device may lose serial bus communications until both VDD and
VBAT are powered down together. To avoid that situation, including
situations where a battery may discharge deeply, the circuit in
Figure 21 can be used.
The diode, DBAT will add a small drop to the battery voltage but
will protect the circuit should battery voltage drop below 1.8V.
The jumper is added as a safeguard should the battery ever need
to be disconnected from the circuit.
The VDD negative slew rate should be limited to below the data
sheet spec (10V/ms) otherwise battery switchover can be
delayed, resulting in SRAM contents corruption and oscillator
operation interruption.
Some applications will require separate supplies for the RTC VDD
and the I2C pull-ups. This is not advised, as it may compromise
the operation of the I2C bus. For applications that do require
serial bus communication with the RTC VDD powered down, the
SDA pin must be pulled low during the time the RTC VDD ramps
down to 0V. Otherwise, the device may lose serial bus
communications once VDD is powered up, and will return to
normal operation ONLY once VDD and VBAT are both powered
down together.
Layout Considerations
The ISL12022MR5421 contains a quarts crystal and requires
special handling during PC board assembly. Excessive shock and
vibrations should be avoided, especially with automated handling
equipment. Ultrasound cleaning is not advisable as it subjects the
in the specifications tables, which pertains to solder reflow effects
on oscillator accuracy.
The part of the package from pin 1 to 5 and from pin 16 to 20
contains the crystal. Low frequency RTC crystals are known to pick
up noise very easily if layout precautions are not followed, even
embedded within a plastic package. Most instances of erratic
clocking or large accuracy errors can be traced to the susceptibility
of the oscillator circuit to interference from adjacent high speed
clock or data lines. Careful layout of the RTC circuit will avoid noise
pickup and insure accurate clocking.
Figure 23 shows a suggested layout for the ISL12022MR5421
device. The following main precautions should be followed:
Do not run the serial bus lines or any high speed logic lines in the
vicinity of pins 1 and 20, or under the package. These logic level
lines can induce noise in the oscillator circuit, causing
misclocking.
Add a ground trace around the device with one end terminated at
the chip ground. This guard ring will provide termination for
emitted noise in the vicinity of the RTC device
Be sure to ground pins 6 and 15 as well as pin 8 as these all
insure the integrity of the device ground
Add a 0.1F decoupling capacitor at the device VDD pin,
especially when using the 32.768kHz FOUT function.
FIGURE 21. SUGGESTED BATTERY BACKUP CIRCUIT
DBAT
CBAT
CIN
BAT43W
0.1F
VDD = 2.7V
VBAT = 1.8V
JBAT
ISL12022MR5421
VDD
GND
VBAT
TO 3.2V
TO 5.5V
+
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| ISL12022MIBZ-T | 功能描述:實時時鐘 REAL TIME CLK & TEMP COMPENSATED CRYSTAL RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12022MIBZ-T7A | 功能描述:IC RTC/CALENDAR TEMP SNSR 20SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 實時時鐘 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:時鐘/日歷 特點:警報器，閏年，SRAM 存儲容量:- 時間格式:HH:MM:SS（12/24 小時） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應商設備封裝:8-TDFN EP 包裝:管件 |
| ISL12022MIBZ-TR5421 | 功能描述:實時時鐘 REAL TIME CLK W/MFK IMPROVED ESD AIR RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12022MR5421 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM, Integrated 5ppm |
| ISL12022M-R5421 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Accuracy RTC Modules, Feature-Rich RTCs |
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