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| 型號： | IS75V16F128GS32-7065BI |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | 存儲器 |
| 英文描述： | 3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA107 |
| 封裝： | 9 X 10 MM, 0.80 MM PITCH, FBGA-107 |
| 文件頁數(shù)： | 40/52頁 |
| 文件大?。?/td> | 264K |
| 代理商： | IS75V16F128GS32-7065BI |
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40
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION
Rev. 00D
03/24/03
IS75V16F128GS32
ISSI
PSRAM POWER DOWN PARAMETERS
Value
Parameter
Symbol
Min.
Max.
Unit
CE2r Low Setup Time for Power down Entry
t
CSP
10
—
—
ns
CE2r Low Hold Time after Power down Entry
CE
1r High Hold Time
Following CE2r
High after Power down Exit
SLEEP Mode only
t
C
2
LP
70
ns
t
CHH
350
—
—
μ
s
μ
s
CE
1r High Setup Time following CE2r High after Power down Exit
(Except for SLEEP Mode)
CE
1r High Setup Time
following CE2r
High after Power down Exit
CE
1r High to
PE
Low Setup Time
(1)
PE
Power Down Program Pulse Width
(1)
PE
High to
CE
1r Low Hold Time
(1)
Address Setup Time to
PE
High
(1)
Address Setup Time from
PE
High
(1)
t
CHHN
1
t
CHS
10
—
—
—
—
—
—
ns
t
EPS
70
ns
t
EP
70
ns
t
EPH
70
ns
t
EAS
15
ns
t
EAH
0
ns
PSRAM OTHER TIMING PARAMETERS
Value
Parameter
Symbol
Min.
Max.
Unit
CE
1r High to
OE
Invalid for Standby Entry
CE
1r High to
WE
Invalid for Standby Entry
(1)
CE2r Low Hold Time after Power-up
(2)
CE2r High Hold Time after Power-up
(3)
CE
1r High Hold Time
Following CE2r
High after Power-up
(2)
Input Transition Time
(4)
Notes:
1. Unintended data may be written into any address location if t
CHWX
is not satisfied.
2. Must satisfy t
CHH
(Min) after t
C2LH
(Min) .
3. Requires Power Down mode entry and exit after t
C2HL
.
4. Input Transition Time (t
T
) at AC testing is 5 ns as shown below. If actual t
T
is longer than 5 ns,
it may violate some timing parameters.
t
CHOX
10
—
—
—
—
—
ns
t
CHWX
10
ns
t
C
2
LH
50
μ
s
μ
s
μ
s
t
C
2
HL
50
t
CHH
350
t
T
1
25
ns
PSRAM AC TEST CONDITIONS
Parameter
Symbol
Condition
Value
Unit
Input High Level
Input Low Level
Input Timing Measurement Level
Input Transition Time
V
IH
V
IL
V
REF
t
T
V
CC
r = 2.7V to 3.3V
V
CC
r = 2.7V to 3.3V
V
CC
r = 2.7V to 3.3V
Between V
IL
and V
IH
2.3
0.4
1.3
5
V
V
V
ns
Note:
1. Applies to Power Down Program.
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