- 您現在的位置：買賣IC網 > PDF目錄377567 > IS61S6432-5PQ (INTEGRATED SILICON SOLUTION INC) Quadruple 2-Input Positive-OR Gates 14-TSSOP -40 to 85 PDF資料下載
參數資料
| 型號： | IS61S6432-5PQ |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | Quadruple 2-Input Positive-OR Gates 14-TSSOP -40 to 85 |
| 中文描述： | 64K X 32 CACHE SRAM, 5 ns, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數： | 13/19頁 |
| 文件大?。?/td> | 140K |
| 代理商： | IS61S6432-5PQ |
Integrated Silicon Solution, Inc.
1-800-379-4774
Rev.
B
06/28/01
13
IS61S6432
ISSI
READ/WRITE CYCLE SWITCHING CHARACTERISTICS
(Over Operating Range)
-200
(1)
Min. Max.
-166
-133
-117
Symbol
Parameter
Min. Max.
Min. Max.
Min. Max.
Unit
t
KC
Cycle Time
5
—
6
—
7.5
—
8.5
—
ns
t
KH
Clock High Time
1.6
—
2.4
—
2.8
—
3
—
ns
t
KL
Clock Low Time
1.6
—
2.4
—
2.8
—
3
—
ns
t
KQ
Clock Access Time
—
4
—
5
—
5
—
5
ns
t
KQX
(2)
Clock High to Output Invalid
1
—
1.5
—
1.5
—
1.5
—
ns
t
KQLZ
(2,3)
Clock High to Output Low-Z
—
0
—
0
—
0
—
ns
t
KQHZ
(2,3)
Clock High to Output High-Z
1
3.5
1.5
5
1.5
5
1.5
6
ns
t
OEQ
Output Enable to Output Valid
—
3.5
—
5
—
5
—
5
ns
t
OEQX
(2)
Output Disable to Output Invalid
0
—
0
—
0
—
0
—
ns
t
OELZ
(2,3)
Output Enable to Output Low-Z
0
—
0
—
0
—
0
—
ns
t
OEHZ
(2,3)
Output Disable to Output High-Z
—
3
—
3
—
3
—
4
ns
t
AS
Address Setup Time
2
—
2.5
—
2.5
—
2.5
—
ns
t
SS
Address Status Setup Time
2
—
2.5
—
2.5
—
2.5
—
ns
t
WS
Write Setup Time
2
—
2.5
—
2.5
—
2.5
—
ns
t
CES
Chip Enable Setup Time
2
—
2.5
—
2.5
—
2.5
—
ns
t
AH
Address Hold Time
0.5
—
0.5
—
0.5
—
0.5
—
ns
t
SH
Address Status Hold Time
0.5
—
0.5
—
0.5
—
0.5
—
ns
t
WH
Write Hold Time
0.5
—
0.5
—
0.5
—
0.5
—
ns
t
CEH
Chip Enable Hold Time
0.5
—
0.5
—
0.5
—
0.5
—
ns
t
CFG
(4)
Configuration Setup
25
—
25
—
30
—
35
—
ns
Notes:
1.
ADVANCE INFORMATION ONLY.
2. Guaranteed but not 100% tested. This parameter is periodically sampled.
3. Tested with load in Figure 2.
4. Configuration signal MODE is static and must not change during normal operation.
相關PDF資料 |
PDF描述 |
|---|---|
| IS61S6432-5PQI | 64K x 32 SYNCHRONOUS PIPELINE STATIC RAM |
| IS61S6432-5TQ | 64K x 32 SYNCHRONOUS PIPELINE STATIC RAM |
| IS61S6432-5TQI | 64K x 32 SYNCHRONOUS PIPELINE STATIC RAM |
| IS61S6432-6PQ | 64K x 32 SYNCHRONOUS PIPELINE STATIC RAM |
| IS61S6432-6PQI | Octal D-Type Transparent Latches With 3-State Outputs 20-SSOP -40 to 85 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IS61SF12832-8.5TQ | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS61SF25618-8.5TQI | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Sync Single 3.3V 4.5M-Bit 256K x 18 8.5ns 100-Pin TQFP |
| IS61SF25618-8.5TQI-TR | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Sync Single 3.3V 4.5M-Bit 256K x 18 8.5ns 100-Pin TQFP T/R |
| IS61SF51218T-10TQ | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Sync Single 3.3V 8M-Bit 512K x 16 10ns 100-Pin TQFP |
| IS61SP12836-133B | 制造商:Integrated Silicon Solution Inc 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。