參數(shù)資料
型號(hào)： IS61NVF102436A-7.5TQI
廠商： INTEGRATED SILICON SOLUTION INC
元件分類(lèi)： SRAM
英文描述： 1M X 36 ZBT SRAM, 7.5 ns, PQFP100
封裝： TQFP-100
文件頁(yè)數(shù)： 1/23頁(yè)
文件大小： 402K
代理商： IS61NVF102436A-7.5TQI
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
1
Rev. B
06/09/08
IS61NLF102436A/IS61NVF102436A
IS61NLF204818A/IS61NVF204818A
Copyright 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
FEATURES
100percentbusutilization
NowaitcyclesbetweenReadandWrite
Internalself-timedwritecycle
IndividualByteWriteControl
SingleRead/Writecontrolpin
Clockcontrolled,registeredaddress,
data and control
Interleavedorlinearburstsequencecontrolus-
ing MODE input
Threechipenablesforsimpledepthexpansion
and address pipelining
PowerDownmode
Commondatainputsanddataoutputs
CKE pin to enable clock and suspend operation
JEDEC100-pinTQFPand165-ballpackages
Powersupply:
NVF:Vdd 2.5V(±5%),Vddq2.5V(±5%)
NLF:Vdd3.3V(±5%),Vddq3.3V/2.5V(±5%)
JTAGBoundaryScanforPBGApackages
Industrialtemperatureavailable
Lead-freeavailable
DESCRIPTION
The36Meg'NLF/NVF'productfamilyfeaturehigh-speed,
low-powersynchronousstaticRAMsdesignedtoprovide
aburstable,high-performance,'nowait'state,devicefor
networking and communications applications.They are
organizedas1Mwordsby36bitsand2Mwordsby18
bits, fabricated with
ISSI'sadvancedCMOStechnology.
Incorporating a 'no wait' state feature, wait cycles are
eliminated when the bus switches from read to write, or
writetoread.Thisdeviceintegratesa2-bitburstcounter,
high-speedSRAMcore,andhigh-drivecapabilityoutputs
into a single monolithic circuit.
All synchronous inputs pass through registers are controlled
byapositive-edge-triggeredsingleclockinput.Operations
may be suspended and all synchronous inputs ignored
when Clock Enable, CKEisHIGH.Inthisstatetheinternal
device will hold their previous values.
AllRead,WriteandDeselectcyclesareinitiatedbytheADV
input.WhentheADVisHIGHtheinternalburstcounter
isincremented.Newexternaladdressescanbeloaded
whenADVisLOW.
Write cycles are internally self-timed and are initiated
by the rising edge of the clock inputs and when WE is
LOW.Separatebyteenablesallowindividualbytestobe
written.
Aburstmodepin(MODE)definestheorderoftheburst
sequence.WhentiedHIGH,theinterleavedburstsequence
isselected.WhentiedLOW,thelinearburstsequenceis
selected.
1M x 36 and 2M x 18
36Mb, FLOW THROUGH 'NO WAIT'
STATE BUS SRAM
JUNE 2008
FAST ACCESS TIME
Symbol
Parameter
6.5
7.5
Units
tkq
ClockAccessTime
6.5
7.5
ns
tkc
CycleTime
7.5
8.5
ns
Frequency
133
117
MHz
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IS61NVF25672-6.5B1I 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18Mb,"No-Wait"/Flowthrough,Sync,256K x 72,6.5ns,2.5v - I/O,209 Ball PBGA RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
IS61NVF25672-6.5B1I-TR 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18Mb,"No-Wait"/Flowthrough,Sync,256K x 72,6.5ns,2.5v - I/O,209 Ball PBGA RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
IS61NVF25672-6.5B1-TR 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18Mb,"No-Wait"/Flowthrough,Sync,256K x 72,6.5ns,2.5v - I/O,209 Ball PBGA RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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