參數(shù)資料
型號(hào): IS61C12816-15TI
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 128K x 16 HIGH-SPEED CMOS STATIC RAM
中文描述: 128K X 16 STANDARD SRAM, 15 ns, PDSO44
封裝: PLASTIC, TSOP2-44
文件頁(yè)數(shù): 6/8頁(yè)
文件大?。?/td> 102K
代理商: IS61C12816-15TI
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
12/19/00
IS61C12816
ISSI
WRITE CYCLE SWITCHING CHARACTERISTICS
(1,3)
(Over Operating Range)
-12
-15
-20
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
t
WC
Write Cycle Time
12
15
20
ns
t
SCE
CE
to Write End
9
10
12
ns
t
AW
Address Setup Time
to Write End
9
10
12
ns
t
HA
Address Hold from Write End
0
0
0
ns
t
SA
Address Setup Time
0
0
0
ns
t
PWB
LB
,
UB
Valid to End of Write
9
10
12
ns
t
PWE
WE
Pulse Width
9
10
12
ns
t
SD
Data Setup to Write End
6
7
9
ns
t
HD
Data Hold from Write End
0
0
0
ns
t
HZWE
(2)
WE
LOW to High-Z Output
6
7
9
ns
t
LZWE
(2)
WE
HIGH to Low-Z Output
3
3
3
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input
pulse levels of 0 to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not
100% tested.
3. The internal write time is defined by the overlap of
CE
LOW and
UB
or
LB
, and
WE
LOW. All
signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write.
The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that
terminates the write.
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參數(shù)描述
IS61C12816-20K 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:128K x 16 HIGH-SPEED CMOS STATIC RAM
IS61C12816-20KI 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:128K x 16 HIGH-SPEED CMOS STATIC RAM
IS61C12816-20T 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:128K x 16 HIGH-SPEED CMOS STATIC RAM
IS61C12816-20TI 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:128K x 16 HIGH-SPEED CMOS STATIC RAM
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