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參數(shù)資料
| 型號： | IS43R16160A |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 16Meg x 16 256-MBIT DDR SDRAM |
| 中文描述： | 16Meg × 16 256兆位DDR SDRAM的 |
| 文件頁數(shù)： | 26/56頁 |
| 文件大小： | 792K |
| 代理商： | IS43R16160A |
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26
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. 00B
11/28/05
ISSI
IS43R16160A
NOTE: (continued)
Row Activating: Starts with registration of an ACTIVE command and ends when
t
RCD is
met. Once
t
RCD is met, the bank will be in the “row active” state.
Read w/Auto-Precharge Enabled: Starts with registration of a READ command with AUTO PRECHARGE
enabled and ends when
t
RP has been met. Once
t
RP is met, the bank will
be in the idle state.
Write w/Auto-Precharge Enabled: Starts with registration of a WRITE command with AUTO PRECHARGE
enabled and ends when
t
RP has been met. Once
t
RP is met, the bank will
be in the idle state.
5. The following states must not be interrupted by any executable command; DESELECT or NOP commands must be
applied on each positive clock edge during these states.
Refreshing: Starts with registration of an AUTO REFRESH command and ends when
t
RC is met. Once
t
RFC is met, the DDR SDRAM will be in the “all banks
idle” state.
Accessing Mode Register: Starts with registration of a MODE REGISTER SET command and ends
when
t
MRD has been met. Once
t
MRD is met, the DDR SDRAM will be in
the “all banks idle” state.
Precharging All: Starts with registration of a PRECHARGE ALL command and ends when
t
RP is met. Once
t
RP is met, all banks will be in the idle state.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle and no bursts are in progress.
8. May or may not be bank-specific; if multiple banks are to be precharged, each must be in a valid state for precharging.
9. Not bank-specific; BURST TERMINATE affects the most recent READ burst, regardless of bank.
10. READs or WRITEs listed in the Command/Action column include READs or WRITEs with AUTO PRECHARGE
enabled and READs or WRITEs with AUTO PRECHARGE disabled.
11. Requires appropriate DM masking.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS43R16320A | 32Meg x 16 512-MBIT DDR SDRAM |
| IS43R16320A-6TL | 32Meg x 16 512-MBIT DDR SDRAM |
| IS43R16800A-6 | 8Meg x 16 128-MBIT DDR SDRAM |
| IS43R16800A-6T | 8Meg x 16 128-MBIT DDR SDRAM |
| IS43R16800A-6TL | 8Meg x 16 128-MBIT DDR SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS43R16160A-5T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 16 256-MBIT DDR SDRAM |
| IS43R16160A-5TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 16 256-MBIT DDR SDRAM |
| IS43R16160A-6T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 16 256-MBIT DDR SDRAM |
| IS43R16160B | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:32Mx8, 16Mx16 256Mb DDR Synchronous DRAM |
| IS43R16160B-5BI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:32Mx8, 16Mx16 256Mb DDR Synchronous DRAM |
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