參數(shù)資料
型號(hào)： IS42S83200B-7T
廠商： INTEGRATED SILICON SOLUTION INC
元件分類： DRAM
英文描述： 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM
中文描述： 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝： PLASTIC, TSOP2-54
文件頁(yè)數(shù)： 27/62頁(yè)
文件大小： 646K
代理商： IS42S83200B-7T
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION
Rev. 00E
05/25/06
27
ISSI
IS42S83200B, IS42S16160B
CLK
CKE
ROW ADDRESS
BANK ADDRESS
CS
RAS
CAS
WE
A0-A12
BA0, BA1
HIGH
ACTIVATING SPECIFIC ROW WITHIN SPE-
CIFIC BANK
DON'T CARE
CLK
COMMAND
ACTIVE
NOP
NOP
t
RCD
T0
T1
T2
T3
T4
READ or
WRITE
CHIP OPERATION
BANK/ROW ACTIVATION
Before any READ or WRITE commands can be issued to a
bank within the SDRAM, a row in that bank must be
“opened.”
This is accomplished via the ACTIVE command, which
selects both the bank and the row to be activated (see
Activating Specific Row Within Specific Bank
).
After opening a row
(issuing an ACTIVE command)
, a
READ or WRITE command may be issued to that row,
subject to the t
RCD
specification. Minimum t
RCD
should be
divided by the clock period and rounded up to the next whole
number to determine the earliest clock edge after the
ACTIVE command on which a READ or WRITE command
can be entered. For example, a t
RCD
specification of 15ns
with a 143 MHz clock (7ns period) results in 2.14 clocks,
rounded to 3. This is reflected in the following example,
which covers any case where 2 < [t
RCD
(MIN)/t
CK
]
≤
3. (The
same procedure is used to convert other specification limits
from time units to clock cycles).
A subsequent ACTIVE command to a different row in the
same bank can only be issued after the previous active row
has been “closed” (precharged). The minimum time interval
between successive ACTIVE commands to the same bank
is defined by t
RC
.
A subsequent ACTIVE command to another bank can be
issued while the first bank is being accessed, which results
in a reduction of total row-access overhead. The minimum
time interval between successive ACTIVE commands to
different banks is defined by t
RRD
.
EXAMPLE: MEETING TRCD (MIN) WHEN 2
<
[TRCD (MIN)/TCK]
≤
3
相關(guān)PDF資料
PDF描述
IS42S83200B-7TI 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM
IS42S83200B-7TL 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM
IS42S83200B-7TLI 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM
IS42S16160B 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM
IS42S16160B-6T 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IS42S83200B-7TI 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M 3.3v 32Mx8 143MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS42S83200B-7TI-TR 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M 3.3v 32Mx8 143MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS42S83200B-7TL 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M 3.3v 32Mx8 143MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS42S83200B-7TLI 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M 3.3v 32Mx8 143MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS42S83200B-7TLI-TR 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M 3.3v 32Mx8 143MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
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