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參數(shù)資料
| 型號(hào)： | IRS20124STRPBF |
| 廠商： | International Rectifier |
| 文件頁(yè)數(shù)： | 16/27頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DRIVER DGTL AUDIO 14-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | MOSFET 驅(qū)動(dòng)器 |
| 應(yīng)用： | 放大器，接收器 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SOIC（窄型） |
| 包裝： | 帶卷 (TR) |
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23
IRS20124S(PbF)
External Resistor Network to Set OC Threshold
Vcc
COM
OCSET1
>0.5mA
R3
R4
R5
OCSET2
How to set OC Threshold
The positive and negative trip thresholds for bi-
directional current sensing are set by the voltages
at OC
SET1 and OCSET2.
The trip threshold voltages, V
SOC+ and VSOC+, are
determined by the required trip current levels, I
TRIP+
I
TRIP-, and RDS(ON) in the low side MOSFET.
Since the sensed voltage of Vs is shifted up by
2.21 V internally and compared with the voltages
fed to the OC
SET1 and OCSET2 pins, the required
value of OC
SET1 with respect to COM is
V
OCSET1 = VSOC+ + 2.21 V = I x RDS(ON) + 2.21 V
ThesamerelationholdsbetweenOC
SET2 and VSOC-,
V
OCSET2 = VSOC- + 2.21 V = I x RDS(ON) + 2.21 V
In general, R
DS(ON) has a positive temperature co-
efficient that needs to be considered when the
threshold level is being set. Please also note that,
in the negative load current direction, the sensing
voltage at the Vs node is limited by the body di-
ode of the low side MOSFET as explained later.
Design Example
This example demonstrates how to use the exter-
nal resistor network to set I
TRIP+ and ITRIP- to be
±11 A, using a MOSFET that has R
DS(ON) =60 .
V
ISET1 = VTH+ + 2.21 V = ITRIP+ x RDS(ON) + 2.21 V=
11 x 60 +2.21 V = 2.87 V
V
ISET2 = VTH- + 2.21 V = ITRIP- x RDS(ON) + 2.21 V=
(11) V 60 +2.21 V = 1.55 V
The total resistance of resistor network is based
on the voltage at the Vcc and required bias cur-
rent in this resistor network.
R
total =R3 + R4 + R5 = Vcc / Ibias
= 12 V / 1 Α = 12 k
The expected voltage across R3 is Vcc- V
ISET1
= 12 V - 2.87 V=9.13 V. Similarly, the voltages
across R4 is V
SOC+
- V
SOC-
= 2.87 V - 1.55 V
=1.32 V, and the voltage across R5 is V
ISET2= 1.55
V respectively.
R3 =9.13 V/ I
bias = 9.13 k
R4 =1.32 V/ I
bias = 1.32 k
R5 =1.55 V/ I
bias = 1.55 k
Choose R3
= 9.09 k R4=1.33 k, R5=1.54 k
from E-96 series.
Consequently, actual threshold levels are
V
SOC+ =2.88 V gives ITRIP+ = 11.2 A
V
SOC- =1.55 V gives ITRIP- = -11.0 A
Resisterswith1%tolerancesarerecommended.
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