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參數(shù)資料
| 型號(hào)： | IR3651SPBF |
| 廠商： | International Rectifier |
| 英文描述： | HIGH VOLTAGE SYNCHRONOUS PWM BUCK CONTROLLER |
| 中文描述： | 高壓同步PWM降壓控制器 |
| 文件頁數(shù)： | 17/19頁 |
| 文件大?。?/td> | 397K |
| 代理商： | IR3651SPBF |
IR3651SP
b
F
10/11/2006
Based on the frequency of the zero generated by
output capacitor and its ESR versus crossover
frequency, the compensation type can be
different.
The
table
compensation types and location of crossover
frequency.
below
shows
the
The following design rules will give a crossover
frequency
approximately
switching frequency. The higher the band width,
the potentially faster the load transient response.
The DC gain will be large enough to provide high
DC-regulation accuracy (typically -5dB to -12dB).
The phase margin should be greater than 45
o
for
overall stability.
one-tenth
of
the
Desired Phase Margin:
Ceramic
F
LC
<F
o
<F
s/2
<F
ESR
TypeIII(PID)
Method B
Tantalum,
ceramic
F
LC
<F
o
<F
ESR
<F
s/2
TypeIII(PID)
Method A
Electrolytic
, Tantalum
F
LC
<F
ESR
<F
o
<F
s/2
TypII(PI)
Output
capacitor
F
ESR
vs. F
o
Compensator
type
R
V
V
V
R
R
F
C
2
1
R
F
C
2
1
R
R
and
R
,
R
Calculate
V
R
V
C
L
F
2
C
R
F
2
1
C
R
F
*
2
1
C
:
C
and
C
C
Calculate
8
ref
o
ref
9
10
2
Z
7
8
2
P
7
10
9
8
10
in
3
osc
o
o
*
o
7
3
3
P
3
3
Z1
4
7
3
4
;
*
;
*
*
*
*
:
;
*
*
*
*
;
*
*
*
=
=
=
=
=
=
π
π
π
π
π
3
π
Θ
=
max
Table1- The compensation type and location
of F
ESR
versus F
o
The details of these compensation types are
discussed in application note AN-1043 which can
be downloaded from IR Web-Site.
For F
LC
<F
o
<F
s/2
<F
ESR
typeIII method B is selected to place the pole and
zeros.
(
1/5
)
s
o
ESR
F
o
F
1/10
~
F
and
F
*
≤
<
g
2
R
F
*
0.5
F
and
F
5
.
0
F
:
Select
Sin
1
Sin
1
F
F
Sin
1
Sin
1
F
F
m
3
s
P3
2
Z
Z1
o
2
P
o
2
Z
≥
=
=
+
=
+
=
*
*
*
Θ
Θ
Θ
Θ
Programming the Current-Limit
The Current-Limit threshold can be set by
connecting a resistor (R
SET
) from drain of low
side MOSFET to the OCSet pin. The resistor
can be calculated by using equation (3).
The
R
DS(on)
has
a
coefficient and it should be considered for the
worse case operation. This resistor must be
placed close to the IC, place a small ceramic
capacitor from this pin to ground for noise
rejection purposes.
positive
temperature
)
3
--(
R
I
R
I
I
on
DS
OCSet
OCSet
critical
L
SET
)
(
)
(
=
=
17
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