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參數(shù)資料
| 型號： | IR22771STRPBF |
| 廠商： | International Rectifier |
| 文件頁數(shù)： | 11/16頁 |
| 文件大小： | 441K |
| 描述： | IC CURRENT SENSE 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 功能： | 電流感應(yīng) |
| 輸入電壓： | 8 V ~ 20 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
IR22771S/IR21771S(PbF)
11
www.irf.com
1.4 DC transfer functions
The working principle of the device can be easily
explained by Figure 10, in which the main signals
are represented.
Triangular
reference
SYNC
Vin
PO
Figure 10: Main current sensor signals and
outputs
PWM out (PO pin) gives a duty cycle which is
inversely proportional to the input signal.
Eq. 2 gives the resulting D
n
of the PWM output (PO
pin):
Eq. 2
in
n
V
V
D
?/DIV>
=
%
40
%
20
where V
in
= V
inp
-V
inm
30%
25%
20%
15%
10%
V
in
PO duty cycle
Figure 11: PO Duty Cycle (D
n
)
1.5 Filter AC characteristic
IR21771/22771 signal path can be considered as
composed by three stages in series (see Figure 13).
The first two stages perform the filtering action.
Stage 1 (input filter) implements the filtering action
originating the transfer function shown in Figure 14.
The input filter is a self-adaptive reset integrator
which performs an accurate ripple cancellation. This
stage extracts automatically the PWM frequency
from Sync signal and puts transmission zeros at
even harmonics, rejecting the unwanted PWM
noise.
The following timing diagram shows the principle by
which even harmonics are rejected (Figure 12).
Figure 12: Even harmonic cancellation principle
As can be seen from Figure 14, the odd harmonics
are rejected as a first order low pass filter with a
single pole placed in f
PWM
.
The input filter group delay in the pass-band is very
low (see GD on AC electrical characteristics) due to
the beneficial action of the zeroes.
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