參數(shù)資料
型號: IR21014
廠商: International Rectifier
英文描述: HIGH AND LOW SIDE DRIVER
中文描述: 高端和低端驅(qū)動
文件頁數(shù): 2/15頁
文件大小: 209K
代理商: IR21014
2
IR2101/IR21014/IR2102/IR21024
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dV
S
/dt
P
D
Definition
Min.
-0.3
Max.
625
Units
High side floating supply voltage
High side floating supply offset voltage
V
B
- 25
V
S
- 0.3
-0.3
V
B
+ 0.3
V
B
+ 0.3
25
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
-0.3
V
CC
+ 0.3
V
CC
+ 0.3
50
Logic input voltage (HIN & LIN)
-0.3
Allowable offset supply voltage transient
Package power dissipation @ T
A
+25°C
V/ns
(8 lead PDIP)
1.0
(8 lead SOIC)
0.625
(14 lead PDIP)
1.6
(14 lead SOIC)
1.0
Rth
JA
Thermal resistance, junction to ambient
(8 lead PDIP)
125
(8 lead SOIC)
200
(14 lead PDIP)
75
(14 lead SOIC)
120
T
J
T
S
T
L
Junction temperature
150
Storage temperature
-55
150
Lead temperature (soldering, 10 seconds)
300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
W
°C/W
V
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
T
A
Definition
Min.
V
S
+ 10
Note 1
Max.
V
S
+ 20
600
Units
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
V
S
10
V
B
20
Low side and logic fixed supply voltage
Low side output voltage
0
V
CC
V
CC
125
Logic input voltage (HIN & LIN) (IR2101) & (HIN & LIN) (IR2102)
0
Ambient temperature
-40
Note 1:
Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
.
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
°C
V
°C
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