參數(shù)資料
型號(hào): IP80C88-2
廠商: Intersil
文件頁(yè)數(shù): 13/38頁(yè)
文件大?。?/td> 0K
描述: IC CPU 8/16BIT 5V 8MHZ 40-DIP
標(biāo)準(zhǔn)包裝: 99
處理器類(lèi)型: 80C88 8/16-位
速度: 8MHz
電壓: 4.75 V ~ 5.25 V
安裝類(lèi)型: 通孔
封裝/外殼: 40-DIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 40-DIP
包裝: 管件
20
FN2949.4
February 22, 2008
FIGURE 10. BUS TIMING - MINIMUM MODE SYSTEM (Continued)
NOTES:
1. Two INTA cycles run back-to-back. The 80C88 local ADDR/DATA bus is floating during both INTA cycles. Control signals are shown for the
second INTA cycle.
2. Signals at 82C84A are shown for reference only.
Waveforms (Continued)
T4
T3
T2
T1
TW
TCLDX1 (7)
TWHDX
TCVCTX
TCHCTV (30)
TCLAV
TCLAZ
TCHCTV
(31) TCVCTX
TCVCTV
(17)
(26)
(27)
(29) TCVCTV
DATA OUT
AD7-AD0
INVALID ADDRESS
CLK (82C84A OUTPUT)
WRITE CYCLE
AD7-AD0
DEN
WR
INTA CYCLE
(NOTE 11)
RD, WR = VOH
AD7-AD0
DT/R
INTA
DEN
AD7-AD0
SOFTWARE
HALT -
DEN, RD,
WR, INTA = VOH
SOFTWARE HALT
(29) TCVCTV
POINTER
TCL2CL1
(5)
TW
TCLAV
TCLDV
TCLAX
(18)
TCLDX2
(29)
(28)
(29) TCVCTV
(19)
TCVCTX
(6)
(30)
(31)
(17)
TCH1CH2
(4)
ALE
IO/M
DT/R
SSO
TCLLH
(23)
TCHLL
(24)
TCVCTX
(31)
TCHCTV
(30)
TDVCL
(31)
TWLWH
(38)
80C88
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