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參數資料
| 型號： | IN74ACT651N |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| 中文描述： | 八路三態(tài)總線收發(fā)器和D觸發(fā)器 |
| 文件頁數： | 5/8頁 |
| 文件大小： | 282K |
| 代理商： | IN74ACT651N |
IN74ACT651
5
TIMING REQUIREMENTS
(V
CC
=5.0 V
±
10 %, C
L
=50pF,Input t
r
=t
f
=3.0 ns)
Symbol
Parameter
Guaranteed Limits
25
°
C
-40
°
C to
85
°
C
8.0
Unit
t
su
Minimum Setup Time, A or B Data Port to A-
to-B Clock or B-to-A Clock (Figure 7)
Minimum Hold Time, A-to-B Clock or B-to-A
Clock to A or B Data Port (Figure 7)
Minimum Pulse Width, A-to-B Clock or B-to-A
Clock (Figure 7)
7.0
ns
t
h
2.5
2.5
ns
t
w
6.0
7.0
ns
TIMING DIAGRAM
相關PDF資料 |
PDF描述 |
|---|---|
| IN74ACT652 | OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT652DW | OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT652N | OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT74D | DUAL D FLIP-FLOP WITH SET AND RESET |
| IN74ACT74N | DUAL D FLIP-FLOP WITH SET AND RESET |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IN74ACT652 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT652DW | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT652N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT74 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:DUAL D FLIP-FLOP WITH SET AND RESET |
| IN74ACT74D | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:DUAL D FLIP-FLOP WITH SET AND RESET |
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