參數(shù)資料
型號: iMC020FLSA
廠商: Intel Corp.
英文描述: 5 Volt Series 2 Flash Memory Card(5V系列2閃速存儲器卡)
中文描述: 5伏2系列閃存卡(5V的系列2閃速存儲器卡)
文件頁數(shù): 30/51頁
文件大小: 827K
代理商: IMC020FLSA
iMC002/004/010/020FLSA
E
30
PRELIMINARY
Table 5. Tuple Format
Bytes
Data
0
Tuple Code: CISTPL_xxx. The tuple code 0FFH indicates no more tuples in the list.
1
Tuple Link: TPL_LlNK. Link to the next tuple in the list. This can be viewed as the number of
additional bytes in tuple, excluding this byte. If the link field is zero, the tuple body is empty. If the
link field contains 0FFH, this tuple is the last tuple in the list.
2
–n
Bytes specific to this tuple.
21.2
The Device Geometry Tuple
This tuple (CISTPL_DEVlCEGEO = 1EH) is
conceptually similar to a DOS disk geometry tuple
(CISTPL_GEOMETRY), except it is not a format-
dependent property; this deals with the fixed
architecture of the memory device(s).
Fields are defined as follows:
DGTPL BUS
—Value = n, where system bus width
= 2
(n
–1)
bytes. N = 2 for standard PCMClA Release
1.0/2.0 cards.
DGTPL EBS
—Value = n, where the memory
array’s physical memory segments have a
minimum erase block size of 2
(n
–1)
address
increments of DGTPL_BUS-wide accesses.
DGTPL RBS
—Value = n, where the memory
array’s physical memory segments have a
minimum read block size of 2
(n
–1)
address
increments of DGTPL_BUS-wide accesses.
DGTPL WBS
—Value = n, where the memory
array’s physical memory segments have a
minimum write block size of 2
(n
–1)
address
increments of DGTPL_BUS-wide accesses.
DGTPL PART
—Value = n, where the memory
array’s physical memory segments can have
partitions subdividing the arrays in minimum
granularity of 2
(n
–1)
number of erase blocks.
FL DEVICE INTERLEAVE
—Value = n, where card
architectures employ a multiple of 2
(n
–1)
times
interleaving of the entire memory arrays with the
above characteristics. Non-interleaved cards have
values n = 1.
21.3
Jedec Programming
Information Tuple
This tuple (CISTPL_JEDEC = 18H) contains the
Intel manufacturing identifier (89H) and the
28F008SA device ID (A2H).
21.4
Level 1 Version/Product
Information Tuple
This tuple (CISTPL_VERI = 15H) contains Level-1-
version
compliance
information. Fields are described as follows:
and
card-manufacturer
TPLLV1 MAJOR
—Major version number = 04H.
TPLLV1 MINOR
—Minor version number = 01H for
release 2.0.
TPLLV1 INFO
Name of manufacturer =
Name of product
Card type
Speed
Register Base
Test Codes
Legalities
intel;
SERIES2-“Card size”;
2;
150 ns or 200 ns
REGBASE 4000H
DBBDRELP
COPYRIGHT intel
Corporation 1991
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