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參數(shù)資料
| 型號(hào)： | IMC016FLSC |
| 廠商： | INTEL CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 5 V Value Series 100 Flash Memory Card(5V 100系列閃速存儲(chǔ)器卡) |
| 中文描述： | 8M X 16 FLASH 5V PROM CARD, 100 ns, XMA68 |
| 封裝： | PC CARD-68 |
| 文件頁(yè)數(shù)： | 11/29頁(yè) |
| 文件大?。?/td> | 211K |
| 代理商： | IMC016FLSC |
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E
The CUI is written by bringing WE# to a logic-low
level (V
IL
) while CE# is low. Addresses and data
are latched on the rising edge of WE#. Standard
microprocessor write timings are used.
iMC002/004/008/016FLSC
11
PRELIMINARY
4.2
Address Decode Logic
The
components device pair is enabled during a read or
write access. Unused upper addresses for the
Value Series 100 card will not be decoded. The
address decoding will wrap around at the card’s
density.
address
decode
logic
selects
which
The Value Series 100 card does not have a
separate attribute memory space and REG# is not
included in the address decode logic. REG#
accesses will result in a read/write to the common
memory flash array.
4.3
Data Control
As shown in Table 3, data paths and directions are
selected by the Data Control logic using WE#, OE#,
CE
#, and CE
# as logic inputs. The Data Control
logic selects any of the PCMCIA word-wide,
even
-
byte and
odd
-byte modes for either reads or writes
to common memory.
NOTE:
This card has a x16 interface. The
odd
byte
cannot
be accessed on the lower data path
(D
0
–7
). A
0
is not decoded.
Table 3. Data Access Mode Truth Table
Mode
RESET
CE
2
#
CE
1
#
OE#
WE#
A
1
V
PP
D
8
–15
D
0–7
Notes
Even Byte-Read
V
IL
V
IH
V
IL
V
IL
V
IH
X
X
High-Z
Even
1,2
Odd Byte-Read
V
IL
V
IL
V
IH
V
IL
V
IH
X
X
Odd
High-Z
1,2
Word-Read
V
IL
V
IL
V
IL
V
IL
V
IH
X
X
Odd
Even
1,2
Even Byte-Write
V
IL
V
IH
V
IL
V
IH
V
IL
X
X
XXX
Even
3
Odd Byte-Write
V
IL
V
IL
V
IH
V
IH
V
IL
X
X
Odd
XXX
3
Word-Write
V
IL
V
IL
V
IL
V
IH
V
IL
X
X
Odd
Even
3
Manufacturer ID
V
IL
V
IL
V
IL
V
IL
V
IH
V
IL
X
89H
89H
Device ID
V
IL
V
IL
V
IL
V
IL
V
IH
V
IH
X
A6H
A6H
4
Standby
V
IL
V
IH
V
IH
X
X
X
X
High-Z
High-Z
Output Disable
V
IL
X
X
V
IH
V
IH
X
X
High-Z
High-Z
Power-Down
V
IH
X
X
X
X
X
X
High-Z
High-Z
NOTES:
1.
2.
3.
4.
Refer to DC Characteristics
X can be V
IL
or V
IH
for control pins and address.
Refer to Table 4 for valid D
IN
during a program operation.
The device code can be A6H or AAH. Software should check for all three cases for compatibility with future cards.
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