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E
1.0
iMC002/004/008/016FLSC
5
PRELIMINARY
SCOPE OF DOCUMENT
This datasheet provides a card architecture
overview, all AC and DC characteristics and
command definitions.
2.0
PRODUCT OVERVIEW
The 2-Mbyte card consist of two 28F008S5 flash
memories. The 4-, 8-, or 16-Mbyte cards consist of
two, four, or eight 28F016S5 flash memories.
Figure 1 provides a functional block diagram of the
16-Mbyte card. All 28F008S5 and 28F016S5
memory components (referred to herein by the
generic 28F0XXS5 part number) are made up of
64-Kbyte, individually erasable blocks. Therefore,
the 2-, 4-, 8-, or 16-Mbyte cards contain 32, 64,
128 or 256 independently-erasable, 64-Kbyte
blocks.
When accessed as 16-bit words, the blocks
appear to be 128 Kbytes. The high byte is in one
64-Kbyte block, the low byte in another. In this
mode, the 2-, 4-, 8-, or 16-Mbyte cards contain 16,
32, 64, or 128, independent 128-Kbyte blocks.
At the device level, internal algorithm automation
allows execution of program and erase operations
using a two-program command sequence. The
automated program/erase algorithms ensure that
data is reliably written in the least amount of time.
The memory card interface supports the PC Card
Standard, supported by Personal Computer
Memory Card Industry Association (PCMCIA) and
Japanese
Electronics
Association (JEIDA) 68-pin card format. The Value
Series 100 card meets all PCMCIA/JEIDA Type 1
mechanical specifications.
Industry
Development
3.0
VALUE SERIES 100 CARD
ARCHITECTURE OVERVIEW
A Value Series 100 card is an array of flash
memory devices in a PC Card form factor. Pairs of
28F008S5 or 28F016S5 (28F0XXS5) devices,
connected in parallel, provide lower and upper
bytes of a 16-bit access.
Typical flash memory components only support a
single operation at a time. Only one block in a
28F0XXS5 can be erased, or only one location
programmed, at a time. Since a Value Series 100
contains multiple devices, it is possible to perform
multiple concurrent operations in the card. A
location in one component can be read while a
location
in
another
programmed. (However, all DC characteristics
presented herein assume that only one operation
is being performed at a time, and that all other
components on the card are in stand-by.)
component
is
being
A user algorithm which would rely on a memory
array based on a specific memory component
capacity would be incompatible among all card
types and component selections. In the future, the
Value Series may use higher capacity memory
devices. Therefore, algorithms that are based on a
particular organization may not be compatible with
these newer, more cost-effective cards.
The Card information Structure (CIS) for the Value
Series 100 card is stored in Block 0 of the flash
memory to reduce the attribute memory cost
overhead of an EEPROM or ASIC. In embedded
applications, a CIS may not be required by the
system and the entire memory array can be used
by the system.
3.1
Card Pinout and Pin
Description
The 68-pin PC Card format provides the system
interface for the Value Series 100 card (see
Tables 1 and 2). The detailed specifications for
this interface are described in the PC Card
Standard Specification. The Value Series 100 card
product
family
conforms
requirements of PCMCIA Versions Release 1.0,
Release 2.0 and Release 2.01 as well as the PC
Card Standard.
to
the
pinout