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1082
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
46.
LCD Controller (LCDC)
46.1 Description
The LCD controller consists of logic for transferring LCD image data from an external display buffer to an LCD module.
The LCD has one display input buffer per overlay that fetches pixels through the AHB master interface and a lookup table
to allow palletized display configurations. The LCD controller is programmable on a per overlay basis, and supports
different LCD resolution, window size, image format and pixel depth.
The LCD is connected to the ARM Advanced High Performance Bus (AHB) as a master for reading pixel data. It also
integrates an APB interface to configure its registers.
46.2 Embedded Characteristics
One AHB Master Interface
Supports Single Scan Active TFT Display
Supports 12-bit, 16-bit, 18-bit and 24-bit Output Mode through the Spatial Dithering Unit
Asynchronous Output Mode Supported
1, 2, 4, 8 bits per pixel (palletized)
12, 16, 18, 19, 24, 25 and 32 bits per pixel (non palletized)
Supports One Base Layer (background)
Supports Ovr1 Layer Window
Supports One High End Overlay (HEO) Window
Supports One Hardware Cursor, Free Ranging up to a size limit of 128x128 pixels
Little Endian Memory Organization
Programmable Timing Engine, with Integer Clock Divider
Programmable Polarity for Data, Line Synchro and Frame Synchro
Hardware Cursor Fixed Size on the following patterns: 32x32, 64x64 and 128x128
Display Size up to 800 x 600
Color Lookup Table with up to 256 entries and Predefined 8-bit Alpha
Programmable Negative and Positive Row Striding for all layers
Programmable Negative and Positive Pixel Striding for all Overlay1 and HEO layers
High End Overlay supports 4:2:0 Planar Mode and Semiplanar Mode
High End Overlay supports 4:2:2 Planar Mode and Packed Memory Mode
High End Overlay includes Chroma Upsampling unit and Programmable Scaler
Integrates Fully Programmable Color Space Conversion
Overlay1 and High End Overlay integrate Rotation Engine: 90, 180, 270
Blender Function Supports Arbitrary 8-bit Alpha value and Chroma Keying
DMA User interface uses Linked List Structure and Add-to-queue Structure