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Table of Contents
5
June 22, 2006
IDT82V3288
WAN PLL
8.1
8.2
8.3
JUNCTION TEMPERATURE ......................................................................................................................................................................152
EXAMPLE OF JUNCTION TEMPERATURE CALCULATION ...................................................................................................................152
HEATSINK EVALUATION ..........................................................................................................................................................................152
9 ELECTRICAL SPECIFICATIONS ..................................................................................................................................153
9.1
ABSOLUTE MAXIMUM RATING ................................................................................................................................................................153
9.2
RECOMMENDED OPERATION CONDITIONS ..........................................................................................................................................153
9.3
I/O SPECIFICATIONS .................................................................................................................................................................................154
9.3.1
AMI Input / Output Port ................................................................................................................................................................ 154
9.3.1.1
Structure ......................................................................................................................................................................... 154
9.3.1.2
I/O Level ......................................................................................................................................................................... 154
9.3.1.3
Over-Voltage Protection ................................................................................................................................................. 156
9.3.2
CMOS Input / Output Port ............................................................................................................................................................ 156
9.3.3
PECL / LVDS Input / Output Port ................................................................................................................................................ 157
9.3.3.1
PECL Input / Output Port ................................................................................................................................................ 157
9.3.3.2
LVDS Input / Output Port ................................................................................................................................................ 159
9.4
JITTER & WANDER PERFORMANCE .......................................................................................................................................................160
9.5
OUTPUT WANDER GENERATION ............................................................................................................................................................163
9.6
INPUT / OUTPUT CLOCK TIMING .............................................................................................................................................................164
9.7
OUTPUT CLOCK TIMING ...........................................................................................................................................................................165
ORDERING INFORMATION ..........................................................................................................................................170