參數(shù)資料
型號(hào)： IDT82V3002A
廠商： Integrated Device Technology, Inc.
英文描述： WAN PLL WITH DUAL REFERENCE INPUTS
中文描述： 廣域網(wǎng)鎖相環(huán)雙基準(zhǔn)輸入
文件頁(yè)數(shù)： 10/28頁(yè)
文件大?。?/td> 390K
代理商： IDT82V3002A
10
IDT82V3002A WAN PLL WITH DUAL REFERENCE INPUTS INDUSTRIAL TEMPERATURE RANGE
3
FUNCTIONAL DESCRIPTION
The IDT82V3002A is a WAN PLL with dual reference inputs,
providing timing (clock) and synchronization (framing) signals to
interface circuits for T1 and E1 Primary Rate Digital Transmission links.
See
Figure - 1
. The detail is described in the following sections.
3.1
STATE CONTROL CIRCUIT
The State Control Circuit is an important part of the IDT82V3002A.
As shown in
Figure - 3
, the State Control Circuit outputs signals to
enable/disable the TIE Control Block and control the operation mode of
the DPLL Block based on MODE_sel0 and MODE_sel1, IN_sel, TIE_en
pins and the result of the Invalid Input Signal Detection.
Figure - 3 State Control Block
The IDT82V3002A has three possible modes of operation: Normal,
Holdover and Freerun. The mode selection pins, MODE_sel1 and
MODE_sel0, select the operation mode. See
Table - 2
.
Figure - 4
shows the state control diagram. All state changes occur
synchronously on the rising edge of F8o. Three operating modes,
Normal (S1), Holdover (S3) and Freerun (S0), can be switched from one
to another by changing the MODE_sel0 and MODE_sel1 logic levels.
The mode changes between Normal (S1) and Auto-Holdover (S2)
are triggered by the Invalid Input Reference Detection Circuit and
irrelative to the logic levels on MODE_sel0 and MODE_sel1 pins. That
is, at the stage of S1, the operating mode will be changed automatically
from Normal (S1) to Auto-Holdover (S2) if an invalid input reference is
detected (input reference is out of the capture range). At the stage of S2,
if a transient on the IN_sel pin is detected, the device will change to the
Short Time Holdover Mode (S4) with the TIE Control Block disabled;
otherwise, the device will be changed back to Normal (S1) automatically
if the input reference becomes valid. Refer to
"Invalid Input Signal
Detection"
for more information.
The mode changes between Normal (S1) and Short Time Holdover
(S4) is determined by whether there is a transient on the IN_sel pin. If
the input reference is switched from one to the other, a transient voltage
will occur at the In_sel pin, which makes the device change from Normal
(S1) to Short Time Holdover (S4) automatically. See
"Reference Input
Switch"
for details.
When the operating mode is changed from one to another, the TIE
control block will be disabled automatically as shown in
Figure - 4
,
except the changes from Holdover (S3), Auto-Holdover (S2), or Short
Time Holdover (S4) to Normal (S1).
Table - 2 Operating Modes and Status
MODE_sel1
MODE_sel0
Mode
0
0
Normal
0
1
Holdover
1
0
Freerun
1
1
Reserved
State Control Circuit
MODE_sel1
MODE_sel0
TIE_en
Output of the
Invalid Input
Signal Detection
F8o
TIE Block
Enable/Disable
DPLL Block
Mode Control
IN_sel
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參數(shù)描述
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IDT82V3002A-01PVG8 制造商:Integrated Device Technology Inc 功能描述:IC PLL WAN T1/E1 56SSOP
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