參數(shù)資料
型號: IDT82V2084PFG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 29/75頁
文件大?。?/td> 0K
描述: IC LIU T1/J1/E1 4CH 128-TQFP
標(biāo)準(zhǔn)包裝: 15
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-TQFP(14x20)
包裝: 托盤
其它名稱: 82V2084PFG
35
INDUSTRIAL
TEMPERATURE RANGES
QUAD CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
Table-24 Per Channel Register List and Map
Address (Hex)
Register R/W
Map
CH1-CH4
b7
b6
b5
b4
b3
b2
b1
b0
Jitter Attenuation Control Register
01,41,81,C1
JACF
R/W
-
JA_LIMIT
JACF1
JACF0
JADP1
JADP0
JABW
Transmit Path Control Registers
02,42,82,C2
TCF0
R/W
-
T_OFF
TD_INV
TCLK_SEL
T_MD1
T_MD0
03,43,83,C3
TCF1
R/W
-
DFM_OFF
THZ
PULS3
PULS2
PULS1
PULS0
04,44,84,C4
TCF2
R/W
-
SCAL5
SCAL4
SCAL3
SCAL2
SCAL1
SCAL0
05,45,85,C5
TCF3
R/W
DONE
RW
UI1
UI0
SAMP3
SAMP2
SAMP1
SAMP0
06,46,86,C6
TCF4
R/W
-
WDAT6
WDAT5
WDAT4
WDAT3
WDAT2
WDAT1
WDAT0
Receive Path Control Registers
07,47,87,C7
RCF0
R/W
-
R_OFF
RD_INV
RCLK_SEL
R_MD1
R_MD0
08,48,88,C8
RCF1
R/W
-
EQ_ON
-
LOS4
LOS3
LOS2
LOS1
LOS0
09,49,89,C9
RCF2
R/W
-
SLICE1
SLICE0
UPDW1
UPDW0
MG1
MG0
Network Diagnostics Control Registers
0A,4A,8A,CA
MAINT0 R/W
-
PATT1
PATT0
PATT_CLK
PRBS_INV
LAC
AISE
ATAO
0B,4B,8B,CB
MAINT1
-
ARLP
RLP
ALP
DLP
0C,4C,8C,CC
MAINT2 R/W
-
TIBLB_L1
TIBLB_L0
RIBLBA_L1
RIBLBA_L0 RIBLBD_L1 RIBLBD_L0
0D,4D,8D,CD
MAINT3 R/W
TIBLB7
TIBLB6
TIBLB5
TIBLB4
TIBLB3
TIBLB2
TIBLB1
TIBLB0
0E,4E,8E,CE
MAINT4 R/W
RIBLBA7
RIBLBA6
RIBLBA5
RIBLBA4
RIBLBA3
RIBLBA2
RIBLBA1
RIBLBA0
0F,4F,8F,CF
MAINT5 R/W
RIBLBD7
RIBLBD6
RIBLBD5
RIBLBD4
RIBLBD3
RIBLBD2
RIBLBD1
RIBLBD0
10,50,90,D0
MAINT6 R/W
-
BPV_INS
ERR_INS
EXZ_DEF
ERR_SEL1
ERR_SEL0
CNT_MD
CNT_TRF
Interrupt Control Registers
11,51,91,D1
INTM0
R/W
EQ_IM
IBLBA_IM
IBLBD_IM
PRBS_IM
TCLK_IM
DF_IM
AIS_IM
LOS_IM
12,52,92,D2
INTM1
R/W DAC_OV_IM
JAOV_IM
JAUD_IM
ERR_IM
EXZ_IM
CV_IM
TIMER_IM
CNT_IM
13,53,93,D3
INTES
R/W
EQ_IES
IBLBA_IES
IBLBD_IES PRBS_IES
TCLK_IES
DF_IES
AIS_IES
LOS_IES
Line Status Registers
14,54,94,D4
STAT0
R
EQ_S
IBLBA_S
IBLBD_S
PRBS_S
TCLK_LOS
DF_S
AIS_S
LOS_S
15,55,95,D5
STAT1
R
-
RLP_S
LATT4
LATT3
LATT2
LATT1
LATT0
Interrupt Status Registers
16,56,96,D6
INTS0
R
EQ_IS
IBLBA_IS
IBLBD_IS
PRBS_IS TCLK_LOS_IS
DF_IS
AIS_IS
LOS_IS
17,57,97,D7
INTS1
R
DAC_OV_IS
JAOV_IS
JAUD_IS
ERR_IS
EXZ_IS
CV_IS
TMOV_IS CNT_OV_IS
Counter Registers
18,58,98,D8
CNT0
R
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
19,59,99,D9
CNT1
R
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
Transmit and Receive Termination Registers
1A,5A,9A,DA
TERM
R/W
-
T_TERM2
T_TERM1
T_TERM0
R_TERM2
R_TERM1
R_TERM0
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