Figure-32 Non-Multip" />
參數(shù)資料
型號: IDT82V2048DAG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 52/62頁
文件大?。?/td> 0K
描述: IC LIU T1/E1 8CH SHORT 144-TQFP
標(biāo)準(zhǔn)包裝: 30
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
包裝: 托盤
其它名稱: 82V2048DAG
56
IDT82V2048 OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT
INDUSTRIAL TEMPERATURE RANGES
INTEL MODE WRITE TIMING CHARACTERISTICS
Figure-32 Non-Multiplexed Intel Mode Write Timing
Figure-33 Multiplexed Intel Mode Write Timing
Symbol
Parameter
Min
Typ
Max
Unit
Comments
t1
Active WR Pulse Width
90
ns
(1)
1. The t1 can be 15 ns when RDY signal is not used.
t2
Active CS to Active WR Setup Time
0
ns
t3
Inactive WR to Inactive CS Hold Time
0
ns
t4
Valid Address to Latch Enable Setup Time (in Multiplexed Mode)
5
ns
t5
Invalid WR to Address Hold Time (in Non-Multiplexed Mode)
2
ns
t6
Valid Data to Inactive WR Setup Time
5
ns
t7
Inactive WR to Data Hold Time
10
ns
t8
Active CS to Inactive RDY Delay Time
6
12
ns
t9
Active WR to Active RDY Delay Time
30
85
ns
t10
Inactive WR to Inactive RDY Delay Time
10
15
ns
t11
Invalid CS to RDY High-Z Delay Time
6
12
ns
t12
Address Latch Enable Pulse Width (in Multiplexed Mode)
10
ns
t13
Inactive ALE to WR Setup Time (in Multiplexed Mode)
0
ns
t14
Inactive ALE to Address hold time (in Multiplexed Mode)
5
ns
t15
Address setup time to Inactive WR time (in Non-Multiplexed Mode)
5
ns
RDY
D[7:0]
A[4:0]
ALE(=1)
WR
CS
t2
t1
t3
t5
t6
t7
t8
t9
t10
t11
ADDRESS
WRITE DATA
t15
RDY
AD[7:0]
ALE
WR
CS
t1
t2
t3
t6
t7
t8
t9
t10
t4
t12
t13
WRITE DATA
ADDRESS
t11
t14
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