參數(shù)資料
型號(hào): IDT82V2042EPFG
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 49/83頁(yè)
文件大小: 0K
描述: IC LIU T1/J1/E1 2CH SHORT 80TQFP
標(biāo)準(zhǔn)包裝: 45
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-TQFP(14x14)
包裝: 托盤
其它名稱: 82V2042EPFG
IDT82V2042E
DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
PROGRAMMING INFORMATION
53
December 12, 2005
Table-43 INTM1: Interrupt Masked Register 1
(R/W, Address = 14H, 34H)
Symbol
Bit
Default
Description
DAC_OV_IM
7
1
DAC arithmetic overflow interrupt mask
= 0: DAC arithmetic overflow interrupt enabled
= 1: DAC arithmetic overflow interrupt masked
JAOV_IM
6
1
JA overflow interrupt mask
= 0: JA overflow interrupt enabled
= 1: JA overflow interrupt masked
JAUD_IM
5
1
JA underflow interrupt mask
= 0: JA underflow interrupt enabled
= 1: JA underflow interrupt masked
ERR_IM
4
1
PRBS/QRSS logic error detect interrupt mask
= 0: PRBS/QRSS logic error detect interrupt enabled
= 1: PRBS/QRSS logic error detect interrupt masked
EXZ_IM
3
1
Receive excess zeros interrupt mask
= 0: Receive excess zeros interrupt enabled
= 1: Receive excess zeros interrupt masked
CV_IM
2
1
Receive error interrupt mask
= 0: Receive error interrupt enabled
= 1: Receive error interrupt masked
TIMER_IM
1
One-Second Timer expiration interrupt mask
= 0: One-Second Timer expiration interrupt enabled
= 1: One-Second Timer expiration interrupt masked
CNT_IM
0
1
Counter overflow interrupt mask
= 0: Counter overflow interrupt enabled
= 1: Counter overflow interrupt masked
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