參數(shù)資料
型號: IDT82V2042EPFG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 27/83頁
文件大?。?/td> 0K
描述: IC LIU T1/J1/E1 2CH SHORT 80TQFP
標準包裝: 45
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應商設(shè)備封裝: 80-TQFP(14x14)
包裝: 托盤
其它名稱: 82V2042EPFG
IDT82V2042E
DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
FUNCTIONAL DESCRIPTION
33
December 12, 2005
3.8.3
REMOTE LOOPBACK
WhentheRLPbit(MAINT1,0DH...)issetto‘1’,thecorrespondingchan-
nel is configured in Remote Loopback mode. In this mode, the recovered
clock and data output from Clock and Data Recovery on the receive path
is looped back to the jitter attenuator (if enabled) and Waveform Shaper in
transmit path. Figure-16 shows the process.
Inhardwarecontrolmode,RemoteLoopbackcanbeselectedbysetting
LPn[1:0] pins to ‘11’ on a per channel basis.
Figure-14 Analog Loopback
Figure-15 Digital Loopback
B8ZS/
HDB3/AMI
Encoder
Jitter
Attenuator
Line
Driver
Waveform
Shaper
B8ZS/
HDB3/AMI
Decoder
Jitter
Attenuator
Data
Slicer
Adaptive
Equalizer
LOS/AIS
Detection
Clock and
Data
Recovery
Transmitter
Internal
Termination
Receiver
Internal
Termination
TCLKn
TDNn
TDn/TDPn
RCLKn
CVn/RDNn
LOSn
RDn/RDPn
RRINGn
TTIPn
TRINGn
RTIPn
Analog
Loopback
One of the Two Identical Channels
B8ZS/
HDB3/AMI
Encoder
Jitter
Attenuator
B8ZS/
HDB3/AMI
Decoder
Jitter
Attenuator
Data
Slicer
Adaptive
Equalizer
LOS/AIS
Detection
Clock and
Data
Recovery
Digital
Loopback
Receiver
Internal
Termination
TCLKn
TDNn
TDn/TDPn
RCLKn
CVn/RDNn
LOSn
RDn/RDPn
RRINGn
TTIPn
TRINGn
RTIPn
Line
Driver
Waveform
Shaper
Transmitter
Internal
Termination
One of the Two Identical Channels
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