- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377487 > IDT821064PQF (INTEGRATED DEVICE TECHNOLOGY INC) QUAD PROGRAMMABLE PCM CODEC WITH GCI INTERFACE PDF資料下載
參數(shù)資料
| 型號： | IDT821064PQF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 編解碼器 |
| 英文描述： | QUAD PROGRAMMABLE PCM CODEC WITH GCI INTERFACE |
| 中文描述： | A/MU-LAW, PROGRAMMABLE CODEC, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數(shù)： | 22/33頁 |
| 文件大?。?/td> | 510K |
| 代理商： | IDT821064PQF |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當(dāng)前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁
22
INDUSTRIAL TEMPERATURE RANGE
IDT821064 QUAD PROGRAMMABLE PCM CODEC WITH GCI INTERFACE
b7
0
b6
0
b5
1
b4
1
b3
0
b2
0
b1
0
b0
1
Command
I/O data
LVLL[7]
LVLL[6]
LVLL[5]
LVLL[4]
LVLL[3]
LVLL[2]
LVLL[1]
LVLL[0]
b7
0
b6
0
b5
1
b4
1
b3
0
b2
0
b1
1
b0
0
Command
I/O data
LVLH[7]
LVLH[6]
LVLH[5]
LVLH[4]
LVLH[3]
LVLH[2]
LVLH[1]
LVLH[0]
b7
R
/W
CN[7]
b6
0
b5
1
b4
1
b3
0
b2
0
b1
1
b0
1
Command
I/O data
CN[6]
CN[5]
CN[4]
CN[3]
CN[2]
CN[1]
CN[0]
14. FSK Mark Length (2FH/AFH), Read/Write
Mark Length bits (ML[7:0]) determine the number of mark bits ‘1’ which will be transmitted in initial flag phase. The value is valid from 0 to 255(d).
The default value is 0(d). When 0(d) is selected, no mark signal will be sent.
15. FSK Start, Mark After Send, BT/Bellcore Select, FSK Channel Select and FSK On/Off (30H/B0H), Read/Write
FSK Channel Select bits (FCS[1:0]) selects the channel on which FSK operation will be implemented.
FCS[1:0] = 00: Channel 1 is selected (default);
FCS[1:0] = 01: Channel 2 is selected;
FCS[1:0] = 10: Channel 3 is selected;
FCS[1:0] = 11: Channel 4 is selected;
FSK On/Off (FO) enables or disables the whole FSK function block.
FO = 0: FSK is disabled (default);
FO = 1: FSK is enabled.
BT/Bellcore Select bit (BS) determines which specification the IDT821064 follows:
BS = 0: Bellcore specification is selected (default);
BS = 1: BT specification is selected.
Mark After Send bit (MAS) determines the FSK block operation after the word data has been sent.
MAS = 0: The output will be muted after sending out word data (default);
MAS = 1: After sending one frame of message data (=< 64 bytes), IDT821064 keeps sending a series of '1' until the MAS bit is set to ‘0’
and the FS bit is set to ‘1’.
FSK Start bit (FS) should be set to ‘1’ when users are going to send out FSK data. It will be cleared to the default value ‘0’ at the end of word data.
When Seizure Length, Mark Length together with Data Length bits are all set to 0, the Transmit Start bit will be reset to ‘0’ immediately after it is set
to ‘1’.
FS = 0: disable (default); FS = 1: transmit start.
16. Level Meter Result Low Register (31H), Read Only
This register contains the lower 8 bits of Level Meter output with the default value of ‘0000-0000’, LVLL[0] is the high active data_ready bit. To read
the level meter result, users should read the low register which contains LVLL[7:0] data first, then read the high register which contains LVLH[7:0]
data. Once the high register is read, the LVLL[0] bit is cleared immediately.
17. Level Meter Result High Register (32H), Read Only
This register contains the higher 8 bits of Level Metering output with the default value of 0(d).
18. Level Meter Count Number (33H/B3H), Read/Write
Level Meter Count Number register is used to configure the number of time cycles for sampling PCM data.
CN[7:0] = 0000-0000: the linear or compressed PCM data is output to LVLH and LVLL directly (default);
CN[7:0] = N: PCM data is sampled for N * 125
μ
s ( N from 1 to 255).
b7
R
/W
ML[7]
b6
0
ML[6]
b5
1
b4
0
ML[4]
b3
1
ML[3]
b2
1
b1
1
ML[1]
b0
1
ML[0]
Command
I/O data
ML[5]
ML[2]
b7
R
/W
R
b6
0
R
b5
1
b4
1
b3
0
FO
b2
0
BS
b1
0
MAS
b0
0
FS
Command
I/O data
FCS[1]
FCS[0]
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT821068 | OCTAL PROGRAMMABLE PCM CODEC |
| IDT821068PX | OCTAL PROGRAMMABLE PCM CODEC |
| IDT821621 | LONG HAUL SLIC |
| IDT821621J | LONG HAUL SLIC |
| IDT82P2281 | Single T1/E1/J1 Long Haul Short Haul Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT821068 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:OCTAL PROGRAMMABLE PCM CODEC |
| IDT821068PX | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:OCTAL PROGRAMMABLE PCM CODEC |
| IDT821621 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:LONG HAUL SLIC |
| IDT821621J | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:LONG HAUL SLIC |
| IDT8217LP35P | 制造商:Integrated Device Technology Inc 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。