參數(shù)資料
型號: IDT821054PQFG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 28/45頁
文件大?。?/td> 0K
描述: IC PCM CODEC QUAD MPI 64-PQFP
標(biāo)準(zhǔn)包裝: 84
類型: PCM 編解碼器/濾波器
數(shù)據(jù)接口: PCM 音頻接口
ADC / DAC 數(shù)量: 4 / 4
三角積分調(diào)變:
電壓 - 電源,模擬: 4.75 V ~ 5.25 V
電壓 - 電源,數(shù)字: 4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-QFP
供應(yīng)商設(shè)備封裝: 64-PQFP(14x14)
包裝: 管件
其它名稱: 800-2516-5
821054PQFG
IDT821054PQFG-ND
34
IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
INDUSTRIAL TEMPERATURE RANGE
transmit PCM data. For compressed code (A/-Law), this register is not used (when being read, it will output a data byte of 00H).
The high byte of transmit PCM data will be read out by applying a read command to this register, and at the same time, it will be
transmitted to the PCM highway without any interference.
LREG9: A/D Gain, D/A Gain, Channel Power Down and PCM Receive Path Cutoff, Read/Write (08H/88H)
The Channel Power Down bit (PD) selects the operation mode for the corresponding channel:
PD = 0:
The corresponding channel is in normal operation state;
PD = 1:
The corresponding channel is powered down (default).
The PCMCT bit determines the operation of PCM Receive Path of the corresponding channel:
PCMCT = 0:
The PCM Receive Path of the corresponding channel is in normal operation state (default);
PCMCT = 1:
The PCM Receive Path of the corresponding channel is cut off.
The A/D Gain bit (GAD) sets the gain of analog A/D for the corresponding channel:
GAD = 0:
0 dB (default);
GAD = 1:
+6 dB.
The D/A Gain bit (GDA) sets the gain of analog D/A for the corresponding channel:
GDA = 0:
0 dB (default);
GDA = 1:
-6 dB.
Attention: To ensure proper operation, the lower 4 bits of the I/O data byte following the write command (88H) must be '0000'.
LREG10: Tone Generator Enable, Read/Write (09H/89H)
TEN1 = 0:
Tone generator 1 is disabled (default);
TEN1 = 1:
Tone generator 1 is enabled.
TEN0 = 0:
Tone generator 0 is disabled (default);
TEN0 = 1:
Tone generator 0 is enabled.
Attention: To ensure proper operation, the b3 and b2 of the I/O data byte following the write command (89H) must be ‘11’.
b7
b6
b5
b4
b3
b2
b1
b0
Command
R/W
0
0010
00
I/O data
PD
PCMCT
GAD
GDA
0
b7
b6
b5
b4
b3
b2
b1
b0
Command
R/W
0
0010
01
I/O data
Reserved
1
TEN1
TEN0
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