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參數(shù)資料
| 型號： | IDT7MP4120 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Octal Bus Transceivers with 3-State Outputs 20-SO -40 to 85 |
| 中文描述： | 100萬× 32的CMOS靜態(tài)RAM模塊 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 83K |
| 代理商： | IDT7MP4120 |
7.07
5
IDT7MP4120
1M x 32 CMOS STATIC RAM MODULE
COMMERCIAL TEMPERATURE RANGE
TIMING WAVEFORM OF READ CYCLE NO. 1
(1)
TIMING WAVEFORM OF READ CYCLE NO. 2
(1,2,4)
OE
t
AA
t
OH
ADDRESS
t
RC
CS
DATAOUT
t
ACS
t
CLZ(5)
t
OHZ(5)
(5)
t
CHZ
t
OLZ(5)
3019 drw 05
t
OE
3019 drw 06
t
AA
t
OH
t
OH
DATA
OUT
ADDRESS
t
RC
DATA VALID
PREVIOUS DATA VALID
3019 drw 07
t
ACS
t
CHZ
DATA
OUT
CS
(5)
t
CLZ(5)
TIMING WAVEFORM OF READ CYCLE NO. 3
(1,3,4)
NOTES:
1.
WE
is HIGH for Read Cycle.
2. Device is continuously selected.
CS
= V
IL
.
3. Address valid prior to or coincident with
CS
transition LOW.
4.
OE
= V
IL
.
5. Transition is measured
±
200mV from steady state. This parameter is guaranteed by design, but not tested.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT7MP4120S20M | 1M x 32 CMOS STATIC RAM MODULE |
| IDT7MP4120S20Z | 1M x 32 CMOS STATIC RAM MODULE |
| IDT7MP4120S25M | 1M x 32 CMOS STATIC RAM MODULE |
| IDT7MP4120S25Z | 1M x 32 CMOS STATIC RAM MODULE |
| IDT7MP4145 | Octal Bus Transceivers with 3-State Outputs 20-SO -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT80ALVCH16823PA | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V CMOS 18-BIT BUS-INTERFACE FLIPFLOP WITH 3-STATE OUTPUTS AND BUS-HOLD |
| IDT80HCPS1432CHM | 制造商:Integrated Device Technology Inc 功能描述:IC RIO SWITCH GEN2 576FCBGA |
| IDT80HCPS1432CHMI | 制造商:Integrated Device Technology Inc 功能描述:IC RIO SWITCH GEN2 576FCBGA |
| IDT80HCPS1432CRM | 制造商:Integrated Device Technology Inc 功能描述:IC RIO SWITCH GEN2 576FCBGA |
| IDT80HCPS1432CRMI | 制造商:Integrated Device Technology Inc 功能描述:IC RIO SWITCH GEN2 576FCBGA |
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