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參數(shù)資料
| 型號： | IDT7MP4045 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 256K x 32 CMOS STATIC RAM MODULE |
| 中文描述： | 256K × 32的CMOS靜態(tài)RAM模塊 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 96K |
| 代理商： | IDT7MP4045 |
IDT7MP4045/7MP4145
256K x 32 CMOS STATIC RAM MODULE
COMMERCIAL TEMPERATURE RANGE
15.2
4
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5V
±
10%, T
A
= 0
°
C to +70
°
C)
’4045SxxZ, ’4045/4145SxxM
–15
Min.
–20
Symbol
Read Cycle
t
RC
t
AA
t
ACS
t
CLZ(1)
t
OE
t
OLZ(1)
t
CHZ(1)
t
OHZ(1)
t
OH
t
PU(1)
t
PD(1)
Write Cycle
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
WHZ(1)
t
DW
t
DH
t
OW(1)
Parameter
Max.
Min.
Max.
Unit
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select to Output in Low-Z
Output Enable to Output Valid
Output Enable to Output in Low-Z
Chip Deselect to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
Chip Select to Power-Up Time
Chip Deselect to Power-Down Time
15
—
—
3
—
0
—
—
3
0
—
—
15
15
—
8
—
8
8
—
—
15
20
—
—
5
—
0
—
—
3
0
—
—
20
20
—
10
—
10
10
—
—
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write Cycle Time
Chip Select to End-of-Write
Address Valid to End-of-Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Write Enable to Output in High-Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End-of-Write
15
12
12
0
12
0
—
10
0
0
—
—
—
—
—
—
8
—
—
—
20
15
15
0
15
0
—
12
0
0
—
—
—
—
—
—
13
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTE:
1. This parameter is guaranteed by design but not tested.
2703 tbl 11
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