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參數(shù)資料
| 型號(hào)： | IDT74LVCH16952APA8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 0.50 MM PITCH, TSSOP-56 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 75K |
| 代理商： | IDT74LVCH16952APA8 |
INDUSTRIALTEMPERATURERANGE
IDT74LVCH16952A
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
1
MARCH 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4073/1
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
IDT74LVCH16952A
DESCRIPTION:
This 16-bit registered transceiver is built using advanced dual metal
CMOS technology. This high-speed, low power device is organized as two
independent 8-bit D-type registered transceivers with separate input and
output control for independent control of data flow in either direction. For
example, the A-to-B Enable (CEAB) must be LOW to enter data from the A
port.CLKABcontrolstheclockingfunction.WhenCLKABtogglesfromLOW-
to-HIGH,thedatapresentontheAportwillbeclockedintotheregister. OEAB
performs the output enable function on the B port. Data flow from the B port
to A port is similar but requires using CEBA, CLKBA, and OEBA inputs. Full
16-bit operation is achieved by tying the control pins of the independent
transceivers together.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCH16952A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
3.3V CMOS 16-BIT
REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
1
OEAB
1
CEAB
1
CLKAB
1
OEBA
1
A1
1
B1
TO SEVEN OTHER CHANNELS
1
CEBA
1
CLKBA
C1
CE
1D
2
OEAB
2
CEAB
2
CLKAB
2
OEBA
2
A1
2
B1
TO SEVEN OTHER CHANNELS
2
CEBA
2
CLKBA
54
55
1
3
2
56
5
52
31
30
28
26
27
29
15
42
C1
CE
1D
C1
CE
1D
C1
CE
1D
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