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參數(shù)資料
| 型號(hào)： | IDT74H16501PV |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD |
| 中文描述： | 3.3V的CMOS 18位通用總線收發(fā)器和三態(tài)輸出和總線狀態(tài)保持 |
| 文件頁(yè)數(shù)： | 2/7頁(yè) |
| 文件大?。?/td> | 78K |
| 代理商： | IDT74H16501PV |
INDUSTRIAL TEMPERATURE RANGE
2
IDT74ALVCH16501
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
OEAB
LEAB
A
1
GND
A
2
A
3
V
CC
A
4
A
5
GND
A
6
A
7
A
8
A
9
GND
A
10
A
11
V
CC
A
12
A
13
OEBA
A
14
A
15
LEBA
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
49
50
51
52
53
54
55
56
1
GND
B
1
B
2
GND
B
3
B
4
V
CC
B
5
B
6
GND
B
7
B
8
B
9
B
10
GND
B
11
B
12
V
CC
B
13
B
14
GND
B
15
B
16
GND
A
16
A
17
25
26
27
28
32
31
30
29
B
18
GND
A
18
CLKBA
B
17
CLKAB
Symbol
V
TERM
(2)
V
TERM
(3)
T
STG
I
OUT
I
IK
Description
Max
Unit
V
V
°C
mA
mA
Termnal Voltage with Respect to GND
Termnal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
I
> V
CC
Continuous Clamp Current, V
O
< 0
Continuous Current through each
V
CC
or GND
–0.5 to +4.6
–0.5 to V
CC
+0.5
–65 to +150
–50 to +50
±50
I
OK
I
CC
I
SS
–50
±100
mA
mA
ABSOLUTE MAX IMUM RATINGS
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUMRATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximumrating
conditions for extended periods may affect reliability.
2. V
CC
termnals.
3. All termnals except V
CC
.
NOTE:
1. As applicable to the device type.
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output Capacitance
I/O Port Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
5
7
7
Max.
7
9
9
Unit
pF
pF
pF
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
Pin Names
OEAB
OEBA
LEAB
LEBA
CLKAB
CLKBA
Ax
Bx
Description
A-to-B Output Enable Input
B-to-A Output Enable Input (Active LOW)
A-to-B Latch Enable Input
B-to-A Latch Enable Input
A-to-B Clock Input
B-to-A Clock Input
A-to-B Data Inputs or B-to-A 3-State Outputs
(1)
B-to-A Data Inputs or A-to-B 3-State Outputs
(1)
PIN DESCRIPTION
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