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參數(shù)資料
| 型號： | IDT74FCT88915TT133PY8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | FCT SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 108K |
| 代理商： | IDT74FCT88915TT133PY8 |
7
IDT74FCT88915TT
LOW SKEW PLL-BASED CMOS CLOCK DRIVER
COMMERCIALTEMPERATURERANGE
Figure 3. Recommended Loop Filter and Analog Isloation Scheme for the FCT88915TT
NOTES:
1. Figure 3 shows a loop filter and analog isolation scheme which will be effective in most applications. The following guidelines should be followed to ensure stable and jitter-free
operation:
a. All loop filter and analog isolation components should be tied as close to the package as possible. Stray current passing through the parasitics of long traces can cause undesirable
voltage transients at the LF pin.
b. The 10F low frequency bypass capacitor and the 0.1F high frequency bypass capacitor form a wide bandwidth filter that will minimize the 88915TT's sensitivity to voltage
transients from the system digital VCC supply and ground planes.
If good bypass techniques are used on a board design near components which may cause digital VCC and ground noise, VCC step deviations should not occur at the 88915TT's
digital VCC supply. The purpose of the bypass filtering scheme shown in Figure 3 is to give the 88915TT additional protection from the power supply and ground plane transients
that can occur in a high frequency, high speed digital system.
c. The loop filter capacitor (0.1F) can be a ceramic chip capacitor, the same as a standard bypass capacitor.
2. In addition to the bypass capacitors used in the analog filter of Figure 3, there should be a 0.1F bypass capacitor between each of the other (digital) four VCC pins and the board
ground plane. This will reduce output switching noise caused by the 88915TT outputs, in addition to reducing potential for noise in the "analog" section of the chip. These bypass
capacitors should also be tied as close to the 88915TT package as possible.
Analog loop filter/VCO
section of the FCT88915TT
ANALOG VCC
ANALOG G ND
LF
BOARD GND
BOARD VCC
0.1
μF (Loop
Filter Cap)
0.1
μF
High
Freq.
Bypass
10
μ F
Low
Freq.
Bypass
A separate Analog power supply is not necessary
and should not be used. Following these pre-
scribed guidelines is all that is necessary to use
the FCT88915TT in a norm al digital environment.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT74FCT88915TT70PY | 功能描述:IC PLL CLK GENERATOR 28-SSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:74FCT 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| IDT74FST163211PV | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FST163233PV | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FST16323PA | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FST163244DPF | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Integrated Device Technology Inc 功能描述: |
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