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參數(shù)資料
型號: IDT74FCT543DTSOG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 6/7頁
文件大?。?/td> 0K
描述: IC TRANSCVER 8BIT NON-INV 24SOIC
標準包裝: 31
系列: 74FCT
邏輯類型: 寄存收發(fā)器,非反相
元件數(shù): 1
每個元件的位元數(shù): 8
輸出電流高,低: 15mA,64mA
電源電壓: 4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 24-SOIC
包裝: 管件
其它名稱: 74FCT543DTSOG
INDUSTRIALTEMPERATURERANGE
6
IDT74FCT543AT/CT/DT
FASTCMOSOCTALLATCHEDTRANSCEIVER
Pulse
Generator
R T
D.U.T
.
V CC
VIN
C L
VOUT
50pF
500W
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
tSU
tH
tREM
tSU
tH
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
tW
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
VOH
tPLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
tPLH
tPHL
VOL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
VOL
0.3V
tPLZ
tPZL
tPZH
tPHZ
3.5V
0V
1.5V
ENABLE
DISABLE
VOH
PRESET
CLEAR
CLOCK ENABLE
ETC.
Octal Link
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuits for All Outputs
Enable and Disable Times
Set-Up, Hold, and Release Times
Pulse Width
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
SWITCH POSITION
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
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IDT74FCT543DTSOG8 功能描述:IC TRANSCVER 8BIT NON-INV 24SOIC RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器,驅(qū)動器,接收器,收發(fā)器 系列:74FCT 標準包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅(qū)動器,非反相 元件數(shù):4 每個元件的位元數(shù):1 輸出電流高,低:4mA,4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC(0.209",5.30mm 寬) 供應商設備封裝:14-SOIC 包裝:管件
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