參數(shù)資料
型號(hào): IDT74FCT16646ATPF8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 總線收發(fā)器
英文描述: FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: TVSOP-56
文件頁數(shù): 1/9頁
文件大?。?/td> 222K
代理商: IDT74FCT16646ATPF8
1
IDT54/74FCT16646T/AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER (3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
JUNE 2000
1999
Integrated Device Technology, Inc.
DSC-5448/-
c
IDT54/74FCT16646T/AT/CT/ET
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS 16-BIT
BUS TRANSCEIVER/
REGISTER (3-STATE)
DESCRIPTION:
The FCT16646T 16-bit registered transceiver is built using advanced
dual metal CMOS technology. These high-speed, low-power devices are
organized as two independent 8-bit bus transceivers with 3-state D-type
registers. The control circuitry is organized for multiplexed transmission of
data between A bus and B bus either directly or from the internal storage
registers. Each 8-bit transceiver/register features direction control (xDIR),
over-riding Output Enable control (x
OE) and Select lines (xSAB and xSBA)
to select either real-time data or stored data. Separate clock inputs are
provided for A and B port registers. Data on the A or B data bus, or both,
can be stored in the internal registers by the low-to-high transitions at the
appropriate clock pins. Flow-through organization of signal pins simplifies
layout. All inputs are designed with hysteresis for improved noise margin.
The FCT16646T is ideally suited for driving high-capacitance loads and
low-impedance backplanes. The output buffers are designed with power off
disable capability to allow "live insertion" of boards when used as backplane
drivers.
FUNCTIONAL BLOCK DIAGRAM
1
B 1
1
A 1
1
OE
1
DIR
1
SBA
1
SAB
1
CLKBA
1
CLKAB
TO S EVE N O THE R C HAN NEL S
B R EG
A R EG
D
C
D
2
B 1
2
A 1
2
OE
2
DIR
2
SBA
2
SAB
2
CLKBA
2
CLKAB
TO S EVE N O THE R C HAN NELS
B R EG
A R EG
D
C
D
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage ≤1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 5V ±10%
High drive outputs (-32mA IOH, 64mA IOL)
Power off disable outputs permit “l(fā)ive insertion”
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA =
25°C
Available in the following packages:
Industrial: SSOP, TSSOP, TVSOP
Military: CERPACK
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