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參數(shù)資料
| 型號： | IDT74ALVCHR162409PA8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 9-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
| 封裝： | 0.50 MM PITCH, TSSOP-56 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 172K |
| 代理商： | IDT74ALVCHR162409PA8 |
1
EXTENDEDCOMMERCIALTEMPERATURERANGE
IDT74ALVCHR162409
3.3V CMOS 9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
MARCH 1999
1999
Integrated Device Technology, Inc.
DSC-4586/-
c
IDT74ALVCHR162409
ADVANCE
INFORMATION
EXTENDED COMMERCIAL TEMPERATURE RANGE
Functional Block Diagram
3.3V CMOS 9-BIT, 4-PORT
UNIVERSAL BUS
EXCHANGER WITH 3-STATE
OUTPUTS AND BUS-HOLD
DESCRIPTION:
This 9-bit, 4-port universal bus exchanger is built using advanced dual
metal CMOS technology. The ALVCHR162409 allows synchronous data
exchange between four different buses. Data flow is controlled by the select
(SEL0–SEL4) inputs. A data-flow state is stored on the rising edge of the
clock (CLK) input if the select-enable (
SELEN) input is low. Once a data-
flow state has been established, data is stored in the flip-flop on the rising
edge of CLK if
SELEN is high. The data-flow control logic is designed to
allow glitch-free data transmission.
When preset (
PRE) transitions high, the outputs are disabled immedi-
ately without waiting for a clock pulse. To leave the high-impedance state,
both
PRE and SELEN must be low and a clock pulse must be applied.
The ALVCHR162409 has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. This
driver has been designed to drive ±12mA at the designated threshold
levels.
The ALVCHR162409 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
FEATURES:
–
0.5 MICRON CMOS Technology
–
Typical tSK(0) (Output Skew) < 250ps
–
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
–
0.635mm pitch SSOP, 0.50mm pitch TSSOP,
and 0.40mm pitch TVSOP packages
–
Extended commercial range of – 40°C to + 85°C
–VCC = 3.3V ± 0.3V, Normal Range
–VCC = 2.7V to 3.6V, Extended Range
–VCC = 2.5V ± 0.2V
–
CMOS power levels (0.4 W typ. static)
–
Rail-to-Rail output swing for increased noise margin
APPLICATIONS:
3.3V High Speed Systems
3.3V and lower voltage computing systems
Drive Features for ALVCHR162409:
–
Balanced Output Drivers: ±12mA
–
Low switching noise
CLK
D
1
A1
2
A1
CLK
D
1
Ax
2
Ax
1
Ax
1
Bx
2
Bx
3
2
Ax
1
Bx
2
Bx
3
CLK
SELEN
56
55
SEL0
SEL1
2
27
Flow and Storage Control
SEL3
SEL4
SEL2
PR E
1
28
29
30
CLK
D
CLK
D
1
Ax
2
Ax
2
Bx
1
Ax
2
Ax
1
Bx
3
1
Bx
2
Bx
1
B1
2
B1
One of Nine Channels
3
15
54
42
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