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參數(shù)資料
| 型號(hào)： | IDT74AUC16374PAI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | 總線(xiàn)收發(fā)器 |
| 英文描述： | AUC SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | TSSOP-48 |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大小： | 77K |
| 代理商： | IDT74AUC16374PAI |
INDUSTRIALTEMPERATURERANGE
IDT74AUC16374
1.8VCMOS16-BITEDGE-TRIGGEREDD-TYPEFLIP-FLOP
1
FEBRUARY 2006
IDT74AUC16374
INDUSTRIAL TEMPERATURE RANGE
1.8V CMOS 16-BIT EDGE-
TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
DESCRIPTION:
This 16-bit edge-triggered D-type flip-flop is built using advanced CMOS
technology. The AUC16374 is particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and working registers. It can be
used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the
clock(CLK)input,theQoutputsoftheflip-floptakeonthelogiclevelsatthedata
(D) inputs.
OEcanbeusedtoplacetheeightoutputsineitheranormallogicstate(high
or low logic levels) or a high-impedance state. In the high-impedance state, the
outputs neither load nor drive the bus lines significantly. The high-impedance
state and the increased drive provide the capability to drive bus lines without
needforinterfaceorpullupcomponents.
OE doesnotaffecttheinternaloperation
of the flip-flop. Old data can be retained or new data can be entered while the
outputs are in the high-impedance state.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the outputs, preventing damaging current backflow
through the device when it is powered down.
To ensure the high-impedance state during power up or power down,
OE
shouldbetiedtoVDDthroughapull-upresistor;theminimumvalueoftheresistor
is determined by the current-sinking capability of the driver.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2006 Integrated Device Technology, Inc.
DSC-6179/7
FEATURES:
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
1.8V Optimized
0.8V to 2.7V Operating Range
Inputs/outputs tolerant up to 3.6V
Output drivers: ±9mA @ 2.3V
Supports hot insertion
Available in TSSOP package
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
high performance, low voltage communications systems
high performance, low voltage computing systems
1
Q1
1
CLK
1
D1
1
OE
C1
1
D
TO SEVEN OTHER CHANNELS
2
Q1
2
CLK
2
D1
2
OE
C1
1
D
TO SEVEN OTHER CHANNELS
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| IDT74CBTLV16210PAG | 功能描述:IC BUS SWITCH 20BIT LV 48-TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 邏輯 - 信號(hào)開(kāi)關(guān)，多路復(fù)用器，解碼器 系列:74CBTLV 標(biāo)準(zhǔn)包裝:48 系列:74VHC 類(lèi)型:多路復(fù)用器 電路:4 x 2:1 獨(dú)立電路:1 輸出電流高，低:8mA，8mA 電壓電源:單電源 電源電壓:2 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:管件 |
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