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參數(shù)資料
| 型號(hào)： | IDT74ALVCH16836PF8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 20-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 0.40 MM PITCH, TVSOP-56 |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 75K |
| 代理商： | IDT74ALVCH16836PF8 |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH16836
3.3V CMOS 20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
1
MARCH 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4498/2
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
IDT74ALVCH16836
3.3V CMOS 20-BIT
UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
AND BUS-HOLD
DESCRIPTION:
This 20-bit universal bus driver is built using advanced dual metal CMOS
technology. Data flow from A to Y is controlled by the output-enable (OE)
input. The device operates in the transparent mode when the latch-enable
(LE) input is low. When LE is high, the A data is latched if the clock (CLK)
input is held at a high or low logic level. If LE is high, the A data is stored
in the latch/flip-flop on the low-to-high transition of CLK. When OE is high,
the outputs are in the high-impedance state.
The ALVCH16836 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The ALVCH16836 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high-impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
SDRAM Modules
PC Motherboards
Workstations
DRIVE FEATURES:
High Output Drivers: ±24mA
Suitable for heavy loads
LE
A1
TO 19 OTHER CHANNELS
OE
CLK
1
55
29
56
1
D
CLK
2
Y1
C1
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