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參數(shù)資料
| 型號： | IDT74ALVCH16646PVG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | SSOP-56 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 110K |
| 代理商： | IDT74ALVCH16646PVG |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
1
JANUARY 2004
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2004 Integrated Device Technology, Inc.
DSC-4221/2
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. The ALVCH16646 can be used as two 8-bit transceivers or one
16-bit transceiver. Data on the A or B bus is clocked into the registers on the
low-to-high transition of the appropriate clock (CLKAB or CLKBA) input.
Output-enable (OE ) and direction-control (DIR) inputs are provided to
controlthetransceiverfunctions.Inthetransceivermode,datapresentatthe
high-impedanceportmaybestoredineitherregisterorboth.Theselectcontrol
(SABandSBA)inputscanmultiplexstoredandreal-time(transparentmode)
data.Thecircuitryusedforselectcontroleliminatesthetypicaldecodingglitch
thatoccursinamultiplexerduringthetransitionbetweenstoredandreal-time
data.DIRdetermineswhichbusreceivesdatawhenOEislow.Intheisolation
mode (OE high), A data may be stored in one register and/or B data may be
storedintheotherregister.Whenanoutputfunctionisdisabled,theinputfunction
isstillenabledandmaybeusedtostoreandtransmitdata.Onlyoneofthetwo
buses, A or B, can be driven at a time.
The ALVCH16646 has been designed with a ±24mA output driver. This
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed
performance.
The ALVCH16646 has “bus-hold” which retains the inputs’ last state
whenevertheinputbusgoestoahighimpedance.Thispreventsfloatinginputs
andeliminatestheneedforpull-up/downresistors.
DRIVE FEATURES:
High Output Drivers: ±24mA
Suitable for heavy loads
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
IDT74ALVCH16646
3.3V CMOS 16-BIT BUS
TRANSCEIVER AND
REGISTER WITH 3-STATE
OUTPUTS AND BUS-HOLD
TO 7 OTHER CHANNELS
1
B1
1
D
C1
1
D
C1
1
A1
1
SAB
1
CLKAB
1
SBA
1
OE
1
CLKBA
56
55
54
2
3
5
52
1
DIR
1
One of 8 Channels
TO 7 OTHER CHANNELS
2
B1
1
D
C1
1
D
C1
2
A1
2
SAB
2
CLKAB
2
SBA
2
OE
2
CLKBA
29
30
31
27
26
15
42
2
DIR
28
One of 8 Channels
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