參數(shù)資料
型號(hào): IDT72V71660DR
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 3/20頁
文件大?。?/td> 0K
描述: IC DGTL SW 16382X16384 208-PQFP
標(biāo)準(zhǔn)包裝: 12
系列: 72V
類型: 多路復(fù)用器
獨(dú)立電路: 4
電壓電源: 單電源
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
包裝: 托盤
其它名稱: 72V71660DR
11
INDUSTRIAL TEMPERATURERANGE
IDT72V71660 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 16,384 x 16,384
TABLE 8 — FRAME INPUT OFFSET REGISTER (FOR) BITS
NOTE:
1. n denotes an input stream number from 0 to 63.
Reset Value:0000H for all FOR registers.
Register
15
14
13
12
11
10
9876
5
4
321
0
FOR0 Register
OF32
OF31
OF30
DLE3
OF22
OF21
OF20
DLE2
OF12
OF11
OF10
DLE1
OF02
OF01
OF00
DLE0
FOR1 Register
OF72
OF71
OF70
DLE7
OF62
OF61
OF60
DLE6
OF52
OF51
OF50
DLE5
OF42
OF41
OF40
DLE4
FOR2 Register
OF112 OF111 OF110 DLE11 OF102 OF101 OF100 DLE10
OF92
OF91
OF90
DLE9
OF82
OF81
OF80
DLE8
FOR3 Register
OF152 OF151 OF150 DLE15 OF142 OF141 OF140 DLE14 OF132 OF131 OF130
DLE13 OF122 OF121 OF120 DLE12
FOR4 Register
OF192 OF191 OF190 DLE19 OF182 OF181 OF180 DLE18 OF172 OF171 OF170
DLE17 OD162 OD161 OF160 DLE16
FOR5 Register
OF232 OF231 OF230 DLE23 OF222 OF221 OF220 DLE22 OF212 OF211 OF210
DLE21 OF202 OF201 OF200 DLE20
FOR6 Register
OF272 OF271 OF270 DLE27 OF262 OF261 OF260 DLE26 OF252 OF251 OF250
DLE25 OF242 OF241 OF240 DLE24
FOR7 Register
OF312 OF311 OF310 DLE31 OF302 OF301 OF300 DLE30 OF292 OF291 OF290
DLE29 OF282 OF281 OF280 DLE28
FOR8 Register
OF352 OF351 OF350 DLE35 OF342 OF341 OF340 DLE34 OF332 OF331 OF330
DLE33 OF322 OF321 OF320 DLE32
FOR9 Register
OF392 OF391 OF390 DLE39 OF382 OF381 OF380 DLE38 OF372 OF371 OF370
DLE37 OF362 OF361 OF360 DLE36
FOR10 Register
OF432 OF431 OF430 DLE43 OF422 OF421 OF420 DLE42 OF412 OF411 OF410
DLE41 OF402 OF401 OF400 DLE40
FOR11 Register
OF472 OF471 OF470 DLE47 OF462 OF461 OF460 DLE46 OF452 OF451 OF450
DLE45 OF442 OF441 OF440 DLE44
FOR12 Register
OF512 OF511 OF510 DLE51 OF502 OF501 OF500 DLE50 OF492 OF491 OF490
DLE49 OF482 OF481 OF480 DLE48
FOR13 Register
OF552 OF551 OF550 DLE55 OF542 OF541 OF540 DLE54 OF532 OF531 OF530
DLE53 OF522 OF521 OF520 DLE52
FOR14 Register
OF592 OF591 OF590 DLE59 OF582 OF581 OF580 DLE58 OF572 OF571 OF570
DLE57 OF562 OF561 OF560 DLE56
FOR15 Register
OF632 OF631 OF630 DLE63 OF622 OF621 OF620 DLE62 OF612 OF611 OF610
DLE61 OF602 OF601 OF600 DLE60
Name(1)
Description
OFn2, OFn1, OFn0
These three bits define how long the serial interface receiver takes to recognize and store bit 0 from the RX input pin: i.e., to start a new frame.
(Offset Bits 2, 1 & 0)
The input frame offset can be selected to +7.5 clock periods from the point where the external frame pulse input signal is applied to the FP
input of the device. See Figure 2.
DLEn
ST-BUS and
DLEn = 0, offset is on the clock boundary
GCI mode:
DLEn = 1, offset is a half clock cycle off of the clock boundary.
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