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| 型號(hào)： | IDT72V51433L7-5BB8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 13/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FLOW CTRL MULTI QUEUE 256-BGA |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 多隊(duì)列流量控制 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-BBGA |
| 供應(yīng)商設(shè)備封裝： | 256-BGA（17x17） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 72V51433L7-5BB8 |
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20
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V51433/72V51443/72V51453 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(16 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
OUTPUT VALID FLAG OPERATION
The multi-queue flow-control device provides a single Output Valid flag
output,
OV.TheOVprovidesanemptystatusordataoutputvalidstatusforthe
data word currently available on the output register of the read port. The rising
edgeofanRCLKcyclethatplacesnewdataontotheoutputregisteroftheread
port, also updates the
OV flag to show whether or not that new data word is
actually valid. Internally the multi-queue flow-control device monitors and
maintains a status of the empty condition of all queues within it, however only
thequeuethatisselectedforreadoperationshasitsoutputvalid(empty)status
output to the
OV flag, giving a valid status for the word being read at that time.
The nature of the first word fall through operation means that when the last
data word is read from a selected queue, the
OV flag will go HIGH on the next
enabled read, that is, on the next rising edge of RCLK while
REN is LOW.
Whenqueueswitchesarebeingmadeonthereadport,the
OVflagwillswitch
toshowstatusofthenewqueueinlinewiththedataoutputfromthenewqueue.
When a queue selection is made the first data from that queue will appear on
the Qout data outputs 2 RCLK cycles later, the
OVwillchangestatetoindicate
validity of the data from the newly selected queue on this 2nd RCLK cycle also.
The previous cycles will continue to output data from the previous queue and
the
OVflagwillindicatethestatusofthoseoutputs.Again,the OV flagalways
indicates status for the data currently present on the output register.
The
OVflagissynchronoustotheRCLKandalltransitionsoftheOVflagoccur
basedonarisingedgeofRCLK.Internallythemulti-queuedevicemonitorsand
keepsarecordoftheoutputvalid(empty)statusforallqueues.Itispossiblethat
thestatusofan
OVflagmaybechanginginternallyeventhoughthatrespective
flag is not the active queue flag (selected on the read port). A queue selected
on the write port may experience a change of its internal
OVflagstatusbased
on write operations, that is, data may be written into that queue causing it to
become “not empty”.
See Figure 12,Read Queue Select, Read Operation and Figure 13, Output
Valid Flag Timing for details of the timing.
EXPANSION MODE – OUTPUT VALID FLAG OPERATION
When multi-queue devices are connected in Expansion mode, the
OVflags
of all devices should be connected together, such that a system controller
monitoring and managing the multi-queue devices read port only looks at a
single
OVflag(asopposedtoadiscreteOVflagforeachdevice).ThisOVflag
is only pertinent to the queue being selected for read operations at that time.
Remember, that when in expansion mode only one multi-queue device can be
read from at any moment in time, thus the
OVflagprovidesstatusoftheactive
queue on the read port.
Thisconnectionofflagoutputstocreateasingleflagrequiresthatthe
OVflag
output have a High-Impedance capability, such that when a queue selection is
made only a single device drives the
OV flagbusandallotherOVflagoutputs
connected to the
OV flagbusareplacedintoHigh-Impedance.Theuserdoes
not have to select this High-Impedance state, a given multi-queue flow-control
devicewillautomaticallyplaceits
OVflagoutputintoHigh-Impedancewhennone
of its queues are selected for read operations.
Whenqueueswithinasingledeviceareselectedforreadoperations,the
OV
flag output of that device will maintain control of the
OVflagbus.ItsOVflagwill
simply update between queue switches to show the respective queue output
validstatus.
Themulti-queuedeviceplacesits
OVflagoutputintoHigh-Impedancebased
onthe3bitIDcodefoundinthe3mostsignificantbitsofthereadqueueaddress
bus,RDADD.Ifthe3mostsignificantbitsofRDADDmatchthe3bitIDcodesetup
on the static inputs, ID0, ID1 and ID2 then the
OV flagoutputoftherespective
device will be in a Low-Impedance state. If they do not match, then the
OVflag
output of the respective device will be in a High-Impedance state. See Figure
13, Output Valid Flag Timing for details of flag operation, including when more
than one device is connected in expansion.
ALMOST FULL FLAG
As previously mentioned the multi-queue flow-control device provides a
singleProgrammableAlmostFullflagoutput,
PAF.ThePAFflagoutputprovides
astatusofthealmostfullconditionfortheactivequeuecurrentlyselectedonthe
write port for write operations. Internally the multi-queue flow-control device
monitors and maintains a status of the almost full condition of all queues within
it, however only the queue that is selected for write operations has its full status
outputtothe
PAFflag.Thisdedicatedflagisoftenreferredtoasthe“activequeue
almost full flag”. The position of the
PAF flag boundary within a queue can be
at any point within that queues depth. This location can be user programmed
via the serial port or one of the default values (8 or 128) can be selected if the
user has performed default programming.
As mentioned, every queue within a multi-queue device has its own almost
fullstatus,whenaqueueisselectedonthewriteport,thisstatusisoutputviathe
PAFflag.ThePAFflagvalueforeachqueueisprogrammedduringmulti-queue
device programming (along with the number of queues, queue depths and
almost empty values). The
PAFoffsetvalue,m,forarespectivequeuecanbe
programmedtobeanywherebetween‘0’and‘D’,where‘D’isthetotalmemory
depthforthatqueue.The
PAFvalueofdifferentqueueswithinthesamedevice
can be different values.
When queue switches are being made on the write port, the
PAFflagoutput
will switch to the new queue and provide the user with the new queue status,
on the second cycle after a new queue selection is made, on the same WCLK
cycle that data can actually be written to the new queue. That is, a new queue
can be selected on the write port via the WRADD bus, WADEN enable and a
rising edge of WCLK. On the second rising edge of WCLK following a queue
selection,the
PAFflagoutputwillshowthefullstatusofthenewlyselectedqueue.
The
PAF is flag output is double register buffered, so when a write operation
occursatthealmostfullboundarycausingtheselectedqueuestatustogoalmost
full the
PAFwillgoLOW2WCLKcyclesafterthewrite.Thesameistruewhen
a read occurs, there will be a 2 WCLK cycle delay after the read operation.
So the
PAF flag delays are:
from a write operation to
PAF flag LOW is 2 WCLK + tWAF
The delay from a read operation to
PAFflagHIGHistSKEW2+WCLK+tWAF
Note, if tSKEW is violated there will be one added WCLK cycle delay.
The
PAFflagissynchronoustotheWCLKandalltransitionsofthePAFflag
occur based on a rising edge of WCLK. Internally the multi-queue device
monitorsandkeepsarecordofthealmostfullstatusforallqueues.Itispossible
that the status of a
PAFflagmaybechanginginternallyeventhoughthatflagis
not the active queue flag (selected on the write port). A queue selected on the
read port may experience a change of its internal almost full flag status based
on read operations. The multi-queue flow-control device also provides a
duplicateofthe
PAFflagonthePAF[7:0]flagbus,thiswillbediscussedindetail
in a later section of the data sheet.
See Figures 18 and 19 for Almost Full flag timing and queue switching.
ALMOST EMPTY FLAG
As previously mentioned the multi-queue flow-control device provides a
single Programmable Almost Empty flag output,
PAE. The PAE flag output
provides a status of the almost empty condition for the active queue currently
selected on the read port for read operations. Internally the multi-queue flow-
controldevicemonitorsandmaintainsastatusofthealmostemptyconditionof
all queues within it, however only the queue that is selected for read operations
has its empty status output to the
PAEflag.Thisdedicatedflagisoftenreferred
toasthe“activequeuealmostemptyflag”.Thepositionofthe
PAEflagboundary
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| IDT72V51433L7-5BBI | 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT72V51436L6BB | 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT72V51436L6BB8 | 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT72V51436L7-5BB | 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT72V51436L7-5BB8 | 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
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