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參數(shù)資料
| 型號： | IDT728981 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | TIME SLOT INTERCHANGE DIGITAL SWITCH 128 x 128 |
| 中文描述： | 時隙交換數(shù)字開關(guān)128 × 128 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 91K |
| 代理商： | IDT728981 |
3
C
ommercial Temperature Range
IDT728981 Time Slot Interchange
Digital Switch 128 x 128
Data to be output on the serial streams may come fromtwo sources: Data
Memory or Connection Memory. The Connection Memory is 16 bits wide and
is split into two 8-bit blocks—Connection Memory HIGH and Connection
Memory LOW. Each location in Connection Memory is associated with a
particular channel in an output streamso as to provide a one-to-one correspon-
dence between Connection and Data Memories. This correspondence allows
for per channel control for each TX output stream
In Processor Mode, data output on the TX is taken fromthe Connection
Memory Low and originates fromthe mcroprocessor (Figure 2). Where as in
Connection Mode (Figure 1), data is read fromData Memory using the address
in Connection Memory. Data destined for a particular channel on the serial
output streamis read during the previous channel time slot to allow time for
memory access and internal parallel-to-serial conversion.
CONNECTION MODE
In Connection Mode, the addresses of input source for all output channels
are stored in the Connection Memory Low. The Connection Memory Low
locations are mapped to corresponding 8-bit x 32-channel output. The contents
of the Data Memory at the selected address are then transferred to the parallel-
to-serial converters. By having the output channel to specify the input channel
through the Connection Memory, input channels can be broadcast to several
output channels.
PROCESSOR MODE
In Processor Mode the CPU writes data to specific Connection Memory Low
locations which are to be output on the TX streams. The contents of the
Connection Memory Low are transferred to the parallel-to-serial converter one
channel before it is to be output and are transmtted each frame to the output until
it is changed by the CPU.
CONTROL
The Connection Memory High bits (Table 4) control the per-channel
functions available in the IDT728981. Output channels are selected into specific
modes such as: Processor mode or Connection mode and Output Drivers
Enabled or in three-state condition.
OUTPUT DRIVE ENABLE (ODE)
The ODE pin is the master three-state output control pin. If the ODE input
is held LOW all TX outputs will be placed in high impedance regardless
Connection Memory High programmng. However, if ODE is HIGH, the contents
of Connection Memory High control the output state on a per-channel basis.
DELAY THROUGH THE IDT728981
The transfer of information fromthe input serial streams to the output serial
streams results in a delay through the device. The delay through the IDT728981
device varies according to the combination of input and output streams and the
movement within the streamfromchannel to channel. Data received on an input
streammust first be stored in Data Memory before it is sent out.
As information enters the IDT728981 it must first pass through an internal
serial-to-parallel converter. Likewise, before data leaves the device, it must
pass through the internal parallel-to-serial converter. This data preparation has
an effect on the channel positioning in the frame immediately following the
incomng frame
—
mainly, data cannot leave in the same time slot. Therefore,
information that is to be output in the same channel position as the information
is input, relative to the frame pulse, will be output in the following frame.
Whether information can be output during a following timeslot after the
information entered the IDT728981 depends on which RX streamthe channel
information enters on and which TX streamthe information leaves on. This is
caused by the order in which input streaminformation is placed into Data Memory
and the order in which streaminformation is queued for output. Table 1 shows the
allowable input/output streamcombinations for the mnimumtwo channel delay.
5703 drw06
TX
Microprocessor
Receive
Serial Data
Streams
Transmit
Serial Data
Streams
Data
Memory
Connection
Memory
Receive
Serial Data
Streams
5703 drw05
RX
TX
Transmit
Serial Data
Streams
Data
Memory
Connection
Memory
Figure 2. Processor Mode
Figure 1. Connection Mode
Table 1. Input Stream to Output Stream Combinations that can Provide the
Minimum 2-Channel Delay
Input
Output Stream
0
1
1,2,3
3
Table 2. Address Mapping
NOTES:
1. Writing to the Control Register is the only fast transaction.
2. Memory and streamare specified by the contents of the Control Register.
A5 A4 A3 A2 A1 A0
HEX ADDRESS
LOCATION
0
1
1
1
·
1
1
X
0
0
X
0
0
X
0
0
0
0
0
0
0
1
00-1F
20
21
Control Register
(1)
Channel 0
(2)
Channel 1
(2)
1
1
1
1
1
3F
Channel 31
(2)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT728981DB | TIME SLOT INTERCHANGE DIGITAL SWITCH 128 x 128 |
| IDT728981J | TIME SLOT INTERCHANGE DIGITAL SWITCH 128 x 128 |
| IDT728981P | TIME SLOT INTERCHANGE DIGITAL SWITCH 128 x 128 |
| IDT728985 | TIME SLOT INTERCHANGE DIGITAL SWITCH |
| IDT7290820 | TIME SLOT INTERCHANGE DIGITAL SWITCH 2,048 x 2,048 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| IDT728981DB | 功能描述:IC DGTL SW 128X128 44-PQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:7200 標(biāo)準(zhǔn)包裝:48 系列:74VHC 類型:多路復(fù)用器 電路:4 x 2:1 獨立電路:1 輸出電流高，低:8mA，8mA 電壓電源:單電源 電源電壓:2 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:管件 |
| IDT728981DBG | 功能描述:IC DGTL SW 128X128 44-PQFP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:7200 標(biāo)準(zhǔn)包裝:48 系列:74VHC 類型:多路復(fù)用器 電路:4 x 2:1 獨立電路:1 輸出電流高，低:8mA，8mA 電壓電源:單電源 電源電壓:2 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:管件 |
| IDT728981J | 功能描述:IC DGTL SW 256X256 44-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:7200 標(biāo)準(zhǔn)包裝:48 系列:74VHC 類型:多路復(fù)用器 電路:4 x 2:1 獨立電路:1 輸出電流高，低:8mA，8mA 電壓電源:單電源 電源電壓:2 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:管件 |
| IDT728981J8 | 功能描述:IC DGTL SW 256X256 44-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:7200 標(biāo)準(zhǔn)包裝:48 系列:74VHC 類型:多路復(fù)用器 電路:4 x 2:1 獨立電路:1 輸出電流高，低:8mA，8mA 電壓電源:單電源 電源電壓:2 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:管件 |
| IDT728981JG | 功能描述:IC DGTL SWITCH ST-BUS 44-PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:- 標(biāo)準(zhǔn)包裝:48 系列:74VHC 類型:多路復(fù)用器 電路:4 x 2:1 獨立電路:1 輸出電流高，低:8mA，8mA 電壓電源:單電源 電源電壓:2 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:管件 |
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