IDT72805LB/72815LB/72825LB/72835LB/72845LB CMOS Dual SyncFIFOTM
參數(shù)資料
型號: IDT72825LB15BG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 17/26頁
文件大小: 0K
描述: IC FIFO SYNC DL 1024X18 121BGA
標準包裝: 63
系列: 7200
功能: 同步
存儲容量: 18.4K(1K x 18)
數(shù)據(jù)速率: 67MHz
訪問時間: 15ns
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 121-BBGA
供應商設備封裝: 121-PBGA(15x15)
包裝: 托盤
其它名稱: 72825LB15BG
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
IDT72805LB/72815LB/72825LB/72835LB/72845LB CMOS Dual SyncFIFOTM
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
24
JANUARY 13, 2009
Figure 30. Block Diagram of 8,192 x 18 Synchronous
FIFO Memory With Programmable Flags used in Depth Expansion Configuration
DEPTH EXPANSION CONFIGURATION — DAISY CHAIN TECHNIQUE
(WITH PROGRAMMABLE FLAGS)
These devices can easily be adapted to applications requiring more than
256/512/1,024/2,048/4,096 words of buffering. Figure 30 shows Depth
Expansion using one IDT72805LB/72815LB/72825LB/72835LB/72845LBs.
Maximum depth is limited only by signal loading. Follow these steps:
1.ThefirstdevicemustbedesignatedbygroundingtheFirstLoad(
FL)controlinput.
2. All other devices must have
FL in the HIGH state.
3. The Write Expansion Out (
WXO) pin of each device must be tied to the
Write Expansion In (
WXI) pin of the next device. See Figure 30.
4. The Read Expansion Out (
RXO) pin of each device must be tied to the
Read Expansion In (
RXI) pin of the next device. See Figure 30.
5. All Load (
LD) pins are tied together.
6. The Half-Full flag (
HF) is not available in this Depth Expansion
Configuration.
7.
EF, FF, PAE, and PAF are created with composite flags by ORing
together every respective flags for monitoring. The composite
PAE and
PAF flags are not precise.
8. In Daisy Chain mode, the flag outputs are single register-buffered and
the partial flags are in asynchronous timing mode.
LOAD
WRITE CLOCK
WRITE ENABLE
READ CLOCK
READ ENABLE
OUTPUT ENABLE
DATA IN
DATA OUT
RESET
FIRST LOAD (FL)
Vcc
WXOA
WXIA
RXOA
RXIA
WXOB
WXIB
RXOB
RXIB
IDT72845
FFA/IRA
PAFA
EFA/ORA
PAEA
PAFB
PAEB
EF/OR
PAE
FF/IR
PAF
3139 drw 30
RCLKB
RENB
OEB
WCLKB
WENB
RSB
FLA
RCLKA
RENA
OEA
WCLKA
WENA
RSA
LDA
DAn
QAn
DBn
QBn
LDB
FIFO A
4,096 x 18
FIFO B
4,096 x 18
FFA/IRA EFA/ORA
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相關代理商/技術參數(shù)
參數(shù)描述
IDT72825LB15BG8 功能描述:IC FIFO SYNC DL 1024X18 121BGA RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:15 系列:74F 功能:異步 存儲容量:256(64 x 4) 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP(0.300",7.62mm) 供應商設備封裝:24-PDIP 包裝:管件 其它名稱:74F433
IDT72825LB15BGG 功能描述:IC FIFO 1024X18 SYNC DL 128TQFP RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:15 系列:74F 功能:異步 存儲容量:256(64 x 4) 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP(0.300",7.62mm) 供應商設備封裝:24-PDIP 包裝:管件 其它名稱:74F433
IDT72825LB15PF 功能描述:IC FIFO SYNC DL 1024X18 128TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:7200 功能:同步 存儲容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT72825LB15PF8 功能描述:IC FIFO SYNC DL 1024X18 128TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:7200 功能:同步 存儲容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT72825LB15PFGI 制造商:Integrated Device Technology Inc 功能描述:IC FIFO SYNC DL 1024X18 128TQFP