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參數(shù)資料
| 型號(hào)： | IDT72615L50PF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS SyncBiFIFOO 256 x 18 x 2 and 512 x 18 x 2 |
| 中文描述： | 512 X 18 BI-DIRECTIONAL FIFO, 25 ns, PQFP64 |
| 封裝： | TQFP-64 |
| 文件頁數(shù)： | 10/20頁 |
| 文件大小： | 209K |
| 代理商： | IDT72615L50PF |
IDT72605/IDT72615 CMOS SyncBiFIFO
256 x 18 x 2 and 512 x 18 x 2
COMMERCIAL TEMPERATURE RANGE
5.18
10
Data B
I/O
I
R/
W
B
0
EN
B
0
OE
B
0
Port B Operation
Data B is written on CLKB
↑
. This write cycle immediately following output low-
impedance cycle is prohibited. Note that even though
OE
B
= 0, a LOW logic level on
R/
W
B
, once qualified by a rising edge on CLK
B,
will put Data B into a high-impedance
state.
Data B is written on CLKB
↑
.
Data B is ignored
Data is read
(1)
from RAM array to output register on CLKB
≠
, Data B is LOW
impedance
Data is read
(1)
from RAM array to output register on CLKB
≠
, Data B is HIGH
impedance
Output register does not change
(2)
, Data B is low-impedance
Output register does not change
(2)
, Data B is high-impedance
0
0
1
0
1
0
1
X
0
I
I
O
1
0
1
O
1
1
1
1
0
1
O
O
NOTES:
1. When A
2
A
1
A
0
= 000 or 1XX, the next A
→
B FIFO value is read out of the output register and the read pointer advances. If A
2
A
1
A
0
= 001, the bypass
path is selected and bypass data is read from the Port B output register.
2. Regardless of the condition of A
2
A
1
A
0
, the data in the Port B output register does not change and the A
→
B read pointer does not advance.
2704 tbl 13
Table 5. Port B Operation Control Signals.
input register and the FIFO memory. If R/
W
B
is HIGH and
OE
B
is LOW, data comes out of bus and is read from output register
into three-state buffer. In bypass mode, if R/
W
B
is LOW,
bypass messages are transferred into B
→
A output register. If
R/
W
A
is HIGH, bypass messages are transferred into A
→
B
output register. Refer to pin descriptions for more information.
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| IDT72615L50PF8 | 功能描述:IC FIFO BY SYNC 512X18X2 64QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT72801L10PF | 功能描述:IC FIFO SYNC DUAL 256X9 64-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT72801L10PF8 | 功能描述:IC FIFO SYNC DUAL 256X9 64-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲(chǔ)容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT72801L10PFG | 功能描述:IC FIFO SYNC DUAL 256X9 64-TQFP RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT72801L10PFG8 | 功能描述:IC FIFO SYNC DUAL 256X9 64-TQFP RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲(chǔ)容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
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