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參數(shù)資料
| 型號： | IDT723631L30PQF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | Quad, High Slew Rate, Single-Supply, Op Amp 14-TSSOP 0 to 70 |
| 中文描述： | 512 X 36 OTHER FIFO, 15 ns, PQFP132 |
| 封裝： | PLASTIC, QFP-132 |
| 文件頁數(shù)： | 21/23頁 |
| 文件大?。?/td> | 269K |
| 代理商： | IDT723631L30PQF |
IDT723631/723641/723651 CMOS SyncFIFO
512 x 36, 1024 x 36, 2048 x 36
COMMERCIAL TEMPERATURE RANGE
21
Figure 16
CALCULATING POWER DISSIPATION
The I
CC
(f) current for the graph in Figure 16 was taken while simultaneously reading and writing the FIFO on the IDT723641
with CLKA and CLKB set to fS. All data inputs and data outputs change state during each clock cycle to consume the highest
supply current. Data outputs were disconnected to normalize the graph to a zero-capacitance load. Once the capacitance
load per data-output channel and the number of IDT723631/723641/723651 inputs driven by TTL HIGH levels are known,
the power dissipation can be calculated with the equation below.
With I
CC
(f) taken from FIgure 16, the maximum power dissipation (PT) of the IDT723631/723641/723651 may be
calculated by:
P
T
= V
CC
x [I
CC(f)
+ (N x
I
CC
x dc)] +
∑
(C
L
x V
CC
2
x
f
O
)
where:
N
=
number of inputs driven by TTL levels
I
CC
=
increase in power supply current for each input at a TTL HIGH level
dc
=
duty cycle of inputs at a TTL HIGH level of 3.4
C
L
=
output capacitance load
f
O
=
switching frequency of an output
When no reads or writes are occurring on the IDT723631/723641/723651, the power dissipated by a single clock (CLKA
or CLKB) input running at frequency fS is calculated by:
P
T
= V
CC
x f
S
x 0.209 mA/MHz
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
CLOCK FREQUENCY
0
10
20
30
40
50
60
70
0
50
100
150
200
250
VCC = 5.0 V
fs
IC
f = 1/2 f
A
°
C
CL
VCC = 4.5 V
VCC = 5.5 V
3023 drw 19
s
相關(guān)PDF資料 |
PDF描述 |
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| IDT723641L15PF | Quad, High Slew Rate, Single-Supply, Op Amp 14-PDIP -40 to 105 |
| IDT723651L30PQF | HIGH-SLEW-RATE, SINGLE-SUPPLY OPERATIONAL AMPLIFIERS 14-SOIC -40 to 105 |
| IDT723641L15PQF | Quad, High Slew Rate, Single-Supply, Op Amp 14-PDIP -40 to 105 |
| IDT723641L20PF | Quad, High Slew Rate, Single-Supply, Op Amp 14-TSSOP -40 to 105 |
| IDT723641L20PQF | Quad, High Slew Rate, Single-Supply, Op Amp 14-TSSOP -40 to 105 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT723632L12PF | 功能描述:IC FIFO SYNC 512X36X2 120QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲容量:256（64 x 4） 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433 |
| IDT723632L12PF8 | 功能描述:IC FIFO SYNC 512X36X2 120QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT723632L12PQF | 功能描述:IC FIFO SYNC 512X36X2 132QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲容量:256（64 x 4） 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433 |
| IDT723632L15PF | 功能描述:IC FIFO SYNC 512X36X2 120QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲容量:256（64 x 4） 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433 |
| IDT723632L15PF8 | 功能描述:IC FIFO SYNC 512X36X2 120QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
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