參數(shù)資料
型號(hào): IDT72141
廠商: Integrated Device Technology, Inc.
英文描述: CMOS PARALLEL-TO-SERIAL FIFO 2048 X 9 4096 X 9
中文描述: CMOS并行到串行FIFO的2048 × 9 4096 × 9
文件頁(yè)數(shù): 7/13頁(yè)
文件大?。?/td> 126K
代理商: IDT72141
5.34
7
IDT72131, IDT72141
CMOS PARALLEL-TO-SERIAL FIFO 2048 x 9 & 4096 x 9
COMMERCIAL TEMPERATURE RANGES
NOTE:
1. Once
EF
has gone LOW and the last bit of the final word has been shifted out, SOCP should not be clocked until
EF
goes HIGH.
NOTE:
1. SOCP should not be clocked until
EF
goes HIGH.
Figure 6. Empty Boundary Condition Timing
2751 drw 09
SOCP
t
WEF
0
1
n – 1
W
EF
SO
t
SOCEF
t
REFSO
DATA
IN
(1)
t
SOLZ
t
SOPD
Figure 5. Empty Flag from Last Read to First Write
2751 drw 08
SOCP
t
WEF
LAST READ
NO READ
FIRST WRITE
ADDITIONAL
WRITES
FIRST READ
0
1
n – 1
0
1
n – 1
W
EF
t
SOPD
SO
VALID
VALID
(1)
t
SOCEF
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