參數(shù)資料
型號(hào): IDT71V2576SA133PF
廠商: Integrated Device Technology, Inc.
元件分類(lèi): 通用總線功能
英文描述: 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect
中文描述: 128K的米鼠36,256 × 18 3.3同步SRAM的2.5VI / O的流水線輸出,脈沖計(jì)數(shù)器,單周期取消
文件頁(yè)數(shù): 3/22頁(yè)
文件大小: 282K
代理商: IDT71V2576SA133PF
6.42
IDT71V2576, IDT71V2578, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with
2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect
Commercial and Industrial Temperature Ranges
11
Linear Burst Sequence Table (LBO=VSS)
Synchronous Write Function Truth Table(1, 2)
Asynchronous Truth Table(1)
Interleaved Burst Sequence Table (LBO=VDD)
NOTES:
1. L = VIL, H = VIH, X = Don’t Care.
2.
BW3 and BW4 are not applicable for the IDT71V2578.
3. Multiple bytes may be selected during the same cycle.
NOTES:
1. L = VIL, H = VIH, X = Don’t Care.
2. Synchronous function pins must be biased appropriately to satisfy operation requirements.
NOTE:
1. Upon completion of the Burst sequence the counter wraps around to its initial state.
NOTE:
1. Upon completion of the Burst sequence the counter wraps around to its initial state.
Operation
GW
BWE
BW1
BW2
BW3
BW4
Read
H
X
XXX
Read
H
L
HH
Write all Bytes
L
XX
XXX
Write all Bytes
H
LL
L
Write Byte 1(3)
HL
L
H
Write Byte 2(3)
HL
H
Write Byte 3(3)
HL
H
L
H
Write Byte 4(3)
HL
H
HL
4876 tbl 12
Sequence 1
Sequence 2
Sequence 3
Sequence 4
A1
A0
A1
A0
A1
A0
A1
A0
First Address
000
11
0
1
Second Address
0
1
0
1
0
Third Address
1
0
1
0
1
Fourth Address(1)
11
00
0
1
0
4876 tbl 15
S equence 1
S equence 2
S equence 3
S equence 4
A1
A0
A1
A0
A1
A0
A1
A0
Firs t A d dres s
0
1
0
1
Se c o nd Ad d re s s
0
1
0
1
0
Third A d dres s
1
0
1
0
1
Fo urth A ddres s
(1)
1
0
1
0
4876 tbl 14
Operation
(2)
OE
ZZ
I/O Status
Power
Read
L
Data Out
Active
Read
H
L
High-Z
Active
Write
X
L
High-Z – Data In
Active
Deselected
X
L
High-Z
Standby
Sleep Mode
X
H
High-Z
Sleep
4876 tbl 13
相關(guān)PDF資料
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IDT71V2576SA133PFI 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect
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